* [linux-next:master 2976/14055] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_init.c:30:6: warning: no previous prototype for 'dcn303_hw_sequencer_construct'
@ 2021-06-30 6:59 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2021-06-30 6:59 UTC (permalink / raw)
To: Aurabindo Pillai
Cc: kbuild-all, Linux Memory Management List, Alex Deucher,
Chris Park
[-- Attachment #1: Type: text/plain, Size: 17741 bytes --]
Hi Aurabindo,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 73748627df83aab934c81332ca83a44ab8c7b3e3
commit: cd6d421e3d1ad5926b74091254e345db730e7706 [2976/14055] drm/amd/display: Initial DC support for Beige Goby
config: x86_64-buildonly-randconfig-r006-20210629 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=cd6d421e3d1ad5926b74091254e345db730e7706
git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
git fetch --no-tags linux-next master
git checkout cd6d421e3d1ad5926b74091254e345db730e7706
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_init.c:30:6: warning: no previous prototype for 'dcn303_hw_sequencer_construct' [-Wmissing-prototypes]
30 | void dcn303_hw_sequencer_construct(struct dc *dc)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:321:19: note: in expansion of macro 'BASE'
321 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:528:2: note: in expansion of macro 'SRII'
528 | SRII(PIXEL_RATE_CNTL, blk, 1)
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:506:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST_303'
506 | HWSEQ_PIXEL_RATE_REG_LIST_303(OTG), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:573:3: note: in expansion of macro 'HWSEQ_DCN303_REG_LIST'
573 | HWSEQ_DCN303_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:371:52: warning: initialized field overwritten [-Woverride-init]
371 | #define DCN_BASE__INST0_SEG1 0x000000C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG1'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:321:19: note: in expansion of macro 'BASE'
321 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:531:2: note: in expansion of macro 'SRII'
531 | SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:507:2: note: in expansion of macro 'HWSEQ_PHYPLL_REG_LIST_303'
507 | HWSEQ_PHYPLL_REG_LIST_303(OTG), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:573:3: note: in expansion of macro 'HWSEQ_DCN303_REG_LIST'
573 | HWSEQ_DCN303_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:371:52: note: (near initialization for 'hwseq_reg.PHYPLL_PIXEL_RATE_CNTL[0]')
371 | #define DCN_BASE__INST0_SEG1 0x000000C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG1'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:321:19: note: in expansion of macro 'BASE'
321 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:531:2: note: in expansion of macro 'SRII'
531 | SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:507:2: note: in expansion of macro 'HWSEQ_PHYPLL_REG_LIST_303'
507 | HWSEQ_PHYPLL_REG_LIST_303(OTG), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:573:3: note: in expansion of macro 'HWSEQ_DCN303_REG_LIST'
573 | HWSEQ_DCN303_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:371:52: warning: initialized field overwritten [-Woverride-init]
371 | #define DCN_BASE__INST0_SEG1 0x000000C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG1'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:321:19: note: in expansion of macro 'BASE'
321 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:532:2: note: in expansion of macro 'SRII'
532 | SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1)
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:507:2: note: in expansion of macro 'HWSEQ_PHYPLL_REG_LIST_303'
507 | HWSEQ_PHYPLL_REG_LIST_303(OTG), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:573:3: note: in expansion of macro 'HWSEQ_DCN303_REG_LIST'
573 | HWSEQ_DCN303_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/sienna_cichlid_ip_offset.h:371:52: note: (near initialization for 'hwseq_reg.PHYPLL_PIXEL_RATE_CNTL[1]')
371 | #define DCN_BASE__INST0_SEG1 0x000000C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG1'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:321:19: note: in expansion of macro 'BASE'
321 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:532:2: note: in expansion of macro 'SRII'
532 | SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1)
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:507:2: note: in expansion of macro 'HWSEQ_PHYPLL_REG_LIST_303'
507 | HWSEQ_PHYPLL_REG_LIST_303(OTG), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:573:3: note: in expansion of macro 'HWSEQ_DCN303_REG_LIST'
573 | HWSEQ_DCN303_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:68:
>> drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7607:111: warning: initialized field overwritten [-Woverride-init]
7607 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:408:2: note: in expansion of macro 'HUBP_SF'
408 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, REFCYC_PER_REQ_DELIVERY, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:606:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
606 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7607:111: note: (near initialization for 'hubp_shift.REFCYC_PER_REQ_DELIVERY')
7607 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:408:2: note: in expansion of macro 'HUBP_SF'
408 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, REFCYC_PER_REQ_DELIVERY, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:606:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
606 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7608:111: warning: initialized field overwritten [-Woverride-init]
7608 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:409:2: note: in expansion of macro 'HUBP_SF'
409 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_LEVEL_FIXED, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:606:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
606 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7608:111: note: (near initialization for 'hubp_shift.QoS_LEVEL_FIXED')
7608 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:409:2: note: in expansion of macro 'HUBP_SF'
409 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_LEVEL_FIXED, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:606:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
606 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7609:111: warning: initialized field overwritten [-Woverride-init]
7609 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:410:2: note: in expansion of macro 'HUBP_SF'
410 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:606:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
606 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7609:111: note: (near initialization for 'hubp_shift.QoS_RAMP_DISABLE')
7609 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:410:2: note: in expansion of macro 'HUBP_SF'
410 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_resource.c:606:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
606 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_3_sh_mask.h:7614:111: warning: initialized field overwritten [-Woverride-init]
7614 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:253:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT'
253 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:411:2: note: in expansion of macro 'HUBP_SF'
411 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL1, REFCYC_PER_REQ_DELIVERY_PRE, mask_sh)
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:193:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
193 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
vim +/dcn303_hw_sequencer_construct +30 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_init.c
29
> 30 void dcn303_hw_sequencer_construct(struct dc *dc)
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2021-06-30 6:59 [linux-next:master 2976/14055] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn303/dcn303_init.c:30:6: warning: no previous prototype for 'dcn303_hw_sequencer_construct' kernel test robot
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