From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>
Cc: x86@kernel.org, Kostya Serebryany <kcc@google.com>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Alexander Potapenko <glider@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
"H . J . Lu" <hjl.tools@gmail.com>,
Andi Kleen <ak@linux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv3 2/8] x86: CPUID and CR3/CR4 flags for Linear Address Masking
Date: Fri, 10 Jun 2022 17:35:21 +0300 [thread overview]
Message-ID: <20220610143527.22974-3-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com>
Enumerate Linear Address Masking and provide defines for CR3 and CR4
flags.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/include/uapi/asm/processor-flags.h | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 393f2bbb5e3a..9835ab09b590 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -300,6 +300,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
index c47cc7f2feeb..d898432947ff 100644
--- a/arch/x86/include/uapi/asm/processor-flags.h
+++ b/arch/x86/include/uapi/asm/processor-flags.h
@@ -82,6 +82,10 @@
#define X86_CR3_PCID_BITS 12
#define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL))
+#define X86_CR3_LAM_U57_BIT 61 /* Activate LAM for userspace, 62:57 bits masked */
+#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT)
+#define X86_CR3_LAM_U48_BIT 62 /* Activate LAM for userspace, 62:48 bits masked */
+#define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT)
#define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */
#define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT)
@@ -132,6 +136,8 @@
#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
#define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement Technology */
#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
+#define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */
+#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT)
/*
* x86-64 Task Priority Register, CR8
--
2.35.1
next prev parent reply other threads:[~2022-06-10 14:35 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-10 14:35 [PATCHv3 0/8] Linear Address Masking enabling Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 1/8] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-06-10 23:32 ` Edgecombe, Rick P
2022-06-10 14:35 ` Kirill A. Shutemov [this message]
2022-06-10 14:35 ` [PATCHv3 3/8] mm: Pass down mm_struct to untagged_addr() Kirill A. Shutemov
2022-06-10 23:33 ` Edgecombe, Rick P
2022-06-17 15:27 ` Alexander Potapenko
2022-06-17 22:38 ` Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 4/8] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-06-10 23:55 ` Edgecombe, Rick P
2022-06-15 15:54 ` Kirill A. Shutemov
2022-06-16 9:08 ` Peter Zijlstra
2022-06-16 16:40 ` Kirill A. Shutemov
2022-06-17 15:35 ` Alexander Potapenko
2022-06-17 22:39 ` Kirill A. Shutemov
2022-06-28 23:33 ` Andy Lutomirski
2022-06-29 0:34 ` Kirill A. Shutemov
2022-06-30 1:51 ` Andy Lutomirski
2022-06-10 14:35 ` [PATCHv3 5/8] x86/uaccess: Provide untagged_addr() and remove tags before address check Kirill A. Shutemov
2022-06-13 17:36 ` Edgecombe, Rick P
2022-06-15 16:58 ` Kirill A. Shutemov
2022-06-15 19:06 ` Edgecombe, Rick P
2022-06-16 9:30 ` Peter Zijlstra
2022-06-16 16:44 ` Kirill A. Shutemov
2022-06-17 11:36 ` Peter Zijlstra
2022-06-17 14:22 ` H.J. Lu
2022-06-17 14:28 ` Peter Zijlstra
2022-06-16 9:34 ` Peter Zijlstra
2022-06-16 10:02 ` Peter Zijlstra
2022-06-16 16:48 ` Kirill A. Shutemov
2022-06-28 23:40 ` Andy Lutomirski
2022-06-29 0:42 ` Kirill A. Shutemov
2022-06-30 2:38 ` Andy Lutomirski
2022-07-05 0:13 ` Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 6/8] x86/mm: Provide ARCH_GET_UNTAG_MASK and ARCH_ENABLE_TAGGED_ADDR Kirill A. Shutemov
2022-06-10 15:25 ` Edgecombe, Rick P
2022-06-10 18:04 ` Kirill A. Shutemov
2022-06-10 16:16 ` Edgecombe, Rick P
2022-06-10 18:06 ` Kirill A. Shutemov
2022-06-10 18:08 ` Edgecombe, Rick P
2022-06-10 22:18 ` Edgecombe, Rick P
2022-06-11 1:12 ` Kirill A. Shutemov
2022-06-11 2:36 ` Edgecombe, Rick P
2022-06-12 21:03 ` Andy Lutomirski
2022-06-16 9:44 ` Peter Zijlstra
2022-06-16 16:54 ` Kirill A. Shutemov
2022-06-30 2:04 ` Andy Lutomirski
2022-06-13 14:42 ` Michal Hocko
2022-06-16 17:05 ` Kirill A. Shutemov
2022-06-19 23:40 ` Kirill A. Shutemov
2022-06-16 9:39 ` Peter Zijlstra
2022-06-28 23:42 ` Andy Lutomirski
2022-06-29 0:53 ` Kirill A. Shutemov
2022-06-30 2:29 ` Andy Lutomirski
2022-07-01 15:38 ` Kirill A. Shutemov
2022-07-02 23:55 ` Andy Lutomirski
2022-07-04 13:43 ` Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 7/8] x86: Expose untagging mask in /proc/$PID/arch_status Kirill A. Shutemov
2022-06-10 15:24 ` Dave Hansen
2022-06-11 1:28 ` Kirill A. Shutemov
2022-06-27 12:00 ` Catalin Marinas
2022-06-10 14:35 ` [PATCHv3 OPTIONAL 8/8] x86/mm: Extend LAM to support to LAM_U48 Kirill A. Shutemov
2022-06-16 10:00 ` Peter Zijlstra
2022-06-10 20:22 ` [PATCHv3 0/8] Linear Address Masking enabling Kostya Serebryany
2022-06-16 22:52 ` Edgecombe, Rick P
2022-06-16 23:43 ` Kirill A. Shutemov
2022-06-16 23:48 ` Edgecombe, Rick P
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220610143527.22974-3-kirill.shutemov@linux.intel.com \
--to=kirill.shutemov@linux.intel.com \
--cc=ak@linux.intel.com \
--cc=andreyknvl@gmail.com \
--cc=dave.hansen@linux.intel.com \
--cc=dvyukov@google.com \
--cc=glider@google.com \
--cc=hjl.tools@gmail.com \
--cc=kcc@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=luto@kernel.org \
--cc=peterz@infradead.org \
--cc=rick.p.edgecombe@intel.com \
--cc=ryabinin.a.a@gmail.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).