From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>
Cc: x86@kernel.org, Kostya Serebryany <kcc@google.com>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Alexander Potapenko <glider@google.com>,
Taras Madan <tarasmadan@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
"H . J . Lu" <hjl.tools@gmail.com>,
Andi Kleen <ak@linux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv5 02/13] x86: CPUID and CR3/CR4 flags for Linear Address Masking
Date: Wed, 13 Jul 2022 02:13:17 +0300 [thread overview]
Message-ID: <20220712231328.5294-3-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20220712231328.5294-1-kirill.shutemov@linux.intel.com>
Enumerate Linear Address Masking and provide defines for CR3 and CR4
flags.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/include/uapi/asm/processor-flags.h | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 03acc823838a..6ad5841e087f 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -300,6 +300,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
index c47cc7f2feeb..d898432947ff 100644
--- a/arch/x86/include/uapi/asm/processor-flags.h
+++ b/arch/x86/include/uapi/asm/processor-flags.h
@@ -82,6 +82,10 @@
#define X86_CR3_PCID_BITS 12
#define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL))
+#define X86_CR3_LAM_U57_BIT 61 /* Activate LAM for userspace, 62:57 bits masked */
+#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT)
+#define X86_CR3_LAM_U48_BIT 62 /* Activate LAM for userspace, 62:48 bits masked */
+#define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT)
#define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */
#define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT)
@@ -132,6 +136,8 @@
#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
#define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement Technology */
#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
+#define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */
+#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT)
/*
* x86-64 Task Priority Register, CR8
--
2.35.1
next prev parent reply other threads:[~2022-07-12 23:13 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-12 23:13 [PATCHv5 00/13] Linear Address Masking enabling Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 01/13] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-07-21 13:10 ` Alexander Potapenko
2022-07-29 3:00 ` Hu, Robert
2022-07-12 23:13 ` Kirill A. Shutemov [this message]
2022-07-21 13:10 ` [PATCHv5 02/13] x86: CPUID and CR3/CR4 flags for Linear Address Masking Alexander Potapenko
2022-07-12 23:13 ` [PATCHv5 03/13] mm: Pass down mm_struct to untagged_addr() Kirill A. Shutemov
2022-07-21 13:12 ` Alexander Potapenko
2022-07-12 23:13 ` [PATCHv5 04/13] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 05/13] x86/uaccess: Provide untagged_addr() and remove tags before address check Kirill A. Shutemov
2022-07-13 15:02 ` [PATCHv5.1 04/13] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-07-20 8:57 ` Alexander Potapenko
2022-07-20 12:38 ` Kirill A. Shutemov
2022-07-21 13:13 ` Alexander Potapenko
2022-07-21 13:14 ` [PATCHv5 05/13] x86/uaccess: Provide untagged_addr() and remove tags before address check Alexander Potapenko
2022-07-12 23:13 ` [PATCHv5 06/13] x86/mm: Provide ARCH_GET_UNTAG_MASK and ARCH_ENABLE_TAGGED_ADDR Kirill A. Shutemov
2022-07-18 17:47 ` Alexander Potapenko
2022-07-20 0:57 ` Kirill A. Shutemov
2022-07-20 8:19 ` Alexander Potapenko
2022-07-20 12:47 ` Kirill A. Shutemov
2022-07-20 12:54 ` Alexander Potapenko
2022-07-12 23:13 ` [PATCHv5 07/13] x86: Expose untagging mask in /proc/$PID/arch_status Kirill A. Shutemov
2022-07-21 13:47 ` Alexander Potapenko
2022-07-12 23:13 ` [PATCHv5 08/13] selftests/x86/lam: Add malloc test cases for linear-address masking Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 09/13] selftests/x86/lam: Add mmap and SYSCALL " Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 10/13] selftests/x86/lam: Add io_uring " Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 11/13] selftests/x86/lam: Add inherit " Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 OPTIONAL 12/13] x86/mm: Extend LAM to support to LAM_U48 Kirill A. Shutemov
2022-07-12 23:13 ` [PATCHv5 OPTIONAL 13/13] selftests/x86/lam: Add tests cases for LAM_U48 Kirill A. Shutemov
2022-07-18 17:39 ` [PATCHv5 00/13] Linear Address Masking enabling Alexander Potapenko
2022-07-20 0:59 ` Kirill A. Shutemov
2022-07-21 13:09 ` Alexander Potapenko
2022-07-21 17:07 ` Dave Hansen
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