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Shutemov" Cc: Ashok Raj , "Kirill A. Shutemov" , Ashok Raj , Dave Hansen , "Andy Lutomirski" , Peter Zijlstra , , Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , "Alexander Potapenko" , Taras Madan , "Dmitry Vyukov" , "H . J . Lu" , Andi Kleen , Rick Edgecombe , , , Jason Gunthorpe , Joerg Roedel , jacob.jun.pan@intel.com Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling Message-ID: <20220914165116.24f82d74@jacob-builder> In-Reply-To: <20220914154532.mmxfsr7eadgnxt3s@box.shutemov.name> References: <20220830010104.1282-1-kirill.shutemov@linux.intel.com> <20220904003952.fheisiloilxh3mpo@box.shutemov.name> <20220912224930.ukakmmwumchyacqc@box.shutemov.name> <20220914144518.46rhhyh7zmxieozs@box.shutemov.name> <20220914151818.uupzpyd333qnnmlt@box.shutemov.name> <20220914154532.mmxfsr7eadgnxt3s@box.shutemov.name> Organization: OTC X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1663199275; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=U+hbnzjPr55Ex5ATqlimaO3AAT/58Y3P7OmF2h3ts78=; b=pPS58DlC1rPV09hgcy4/oMMaz5mToKJDMJ5xiinS39FL89bQNc40i55ghsspySXqZ9XooH lotcGsjRNWOgEibzNl5xq2masssRWZlYfi7oZANMzjZVVmxPF7t8E2ro+QwsirJh/sPUd5 c82hiFRRFwimtg9CjT5VM1Y1MFWb1Ow= ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=AGHhyeqI; dmarc=pass (policy=none) header.from=intel.com; spf=pass (imf10.hostedemail.com: domain of jacob.jun.pan@intel.com designates 134.134.136.24 as permitted sender) smtp.mailfrom=jacob.jun.pan@intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1663199275; a=rsa-sha256; cv=none; b=AIo85iEnNRIDNWCWWSZyVKmQcXKdkxyW0eslOmaDAriDfJyNSJgOYAi+gxEw9u2UWO4n1U Ed6AjmgxnpUwY8xUO7P4dIVyVzacrwWMfYVBLRT3YDfAOTc4DYqUcbIU+2Ogm8UtMnRaX0 th8vAH+eAoqBHJ6j1atUOK6nJPpM0Xc= Authentication-Results: imf10.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=AGHhyeqI; dmarc=pass (policy=none) header.from=intel.com; spf=pass (imf10.hostedemail.com: domain of jacob.jun.pan@intel.com designates 134.134.136.24 as permitted sender) smtp.mailfrom=jacob.jun.pan@intel.com X-Stat-Signature: cw3z9h1arzmg8w34bmdytarjawc4gjii X-Rspamd-Queue-Id: 5A633C008C X-Rspam-User: X-Rspamd-Server: rspam09 X-HE-Tag: 1663199274-137549 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi Kirill, On Wed, 14 Sep 2022 18:45:32 +0300, "Kirill A. Shutemov" wrote: > On Wed, Sep 14, 2022 at 08:31:56AM -0700, Ashok Raj wrote: > > On Wed, Sep 14, 2022 at 06:18:18PM +0300, Kirill A. Shutemov wrote: > > > > > > > > > > > > > > The patch below implements something like this. It is PoC, > > > > > > > build-tested only. > > > > > > > > > > > > > > To be honest, I hate it. It is clearly a layering violation. > > > > > > > It feels dirty. But I don't see any better way as we tie > > > > > > > orthogonal features together. > > > > > > > > > > > > > > Also I have no idea how to make forced PASID allocation if > > > > > > > LAM enabled. What the API has to look like? > > > > > > > > > > > > Jacob, Ashok, any comment on this part? > > > > > > > > > > > > I expect in many cases LAM will be enabled very early (like > > > > > > before malloc is functinal) in process start and it makes PASID > > > > > > allocation always fail. > > > > > > > > > > > > Any way out? > > > > > > > > > > We need closure on this to proceed. Any clue? > > > > > > > > Failing PASID allocation seems like the right thing to do here. If > > > > the application is explicitly allocating PASID's it can opt-out > > > > using the similar mechanism you have for LAM enabling. So user takes > > > > responsibility for sanitizing pointers. > > > > > > > > If some library is using an accelerator without application > > > > knowledge, that would use the failure as a mechanism to use an > > > > alternate path if one exists. > > > > > > > > I don't know if both LAM and SVM need a separate forced opt-in (or i > > > > don't have an opinion rather). Is this what you were asking? > > > > > > > > + Joerg, JasonG in case they have an opinion. > > > > > > My point is that the patch provides a way to override LAM vs. PASID > > > mutual exclusion, but only if PASID allocated first. If we enabled > > > LAM before PASID is allcoated there's no way to forcefully allocate > > > PASID, bypassing LAM check. I think there should be one, no? > > > > Yes, we should have one for force enabling SVM too if the application > > asks for forgiveness. > > What is the right API here? > It seems very difficult to implement a UAPI for the applications to override at a runtime. Currently, SVM bind is under the control of individual drivers. It could be at the time of open or some ioctl. Perhaps, this can be a platform policy via some commandline option. e.g. intel_iommu=sva_lam_coexist. Thanks, Jacob