From: guoren@kernel.org
To: guoren@kernel.org, palmer@dabbelt.com, palmer@rivosinc.com,
heiko@sntech.de, arnd@arndb.de, songmuchun@bytedance.com,
catalin.marinas@arm.com, chenhuacai@loongson.cn,
Conor.Dooley@microchip.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-mm@kvack.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
Date: Sun, 23 Oct 2022 09:32:05 -0400 [thread overview]
Message-ID: <20221023133205.3493564-3-guoren@kernel.org> (raw)
In-Reply-To: <20221023133205.3493564-1-guoren@kernel.org>
From: Guo Ren <guoren@linux.alibaba.com>
This patch enable the feature of "free some vmemmap pages of HugeTLB
page" [1]. To make it work correct, we also need fixup PG_dcache_clean
setting for huge page [2].
[1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
[2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Muchun Song <songmuchun@bytedance.com>
Cc: Huacai Chen <chenhuacai@loongson.cn>
Cc: Arnd Bergmann <arnd@arndb.de>
---
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/cacheflush.h | 3 +++
arch/riscv/mm/cacheflush.c | 3 +++
3 files changed, 7 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6b48a3ae9843..81ac25b0e005 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -45,6 +45,7 @@ config RISCV
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_GENERAL_HUGETLB
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
+ select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
select BUILDTIME_TABLE_SORT if MMU
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 8a5c246b0a21..96f7381aeeeb 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -17,6 +17,9 @@ static inline void local_flush_icache_all(void)
static inline void flush_dcache_page(struct page *page)
{
+ if (PageHuge(page))
+ page = compound_head(page);
+
if (test_bit(PG_dcache_clean, &page->flags))
clear_bit(PG_dcache_clean, &page->flags);
}
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 7c9f97fa3938..ca35807cf185 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,6 +82,9 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
+ if (PageHuge(page))
+ page = compound_head(page);
+
if (!test_bit(PG_dcache_clean, &page->flags)) {
flush_icache_all();
set_bit(PG_dcache_clean, &page->flags);
--
2.36.1
next prev parent reply other threads:[~2022-10-23 13:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-23 13:32 [PATCH 0/2] Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP & fixup race condition on PG_dcache_clean guoren
2022-10-23 13:32 ` [PATCH 1/2] riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte guoren
2022-10-23 13:32 ` guoren [this message]
2022-10-24 7:07 ` [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP Muchun Song
2022-10-24 8:02 ` Guo Ren
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