From: "Matthew Wilcox (Oracle)" <willy@infradead.org>
To: linux-mm@kvack.org, Huacai Chen <chenhuacai@kernel.org>,
WANG Xuerui <kernel@xen0n.name>,
loongarch@lists.linux.dev, linux-arch@vger.kernel.org
Cc: "Matthew Wilcox (Oracle)" <willy@infradead.org>
Subject: [PATCH 13/7] loongson: Implement the new page table range API
Date: Wed, 15 Feb 2023 00:04:46 +0000 [thread overview]
Message-ID: <20230215000446.1655635-5-willy@infradead.org> (raw)
In-Reply-To: <20230215000446.1655635-1-willy@infradead.org>
Add set_ptes() and update_mmu_cache_range().
THIS PATCH IS INCOMPLETE. I DO NOT KNOW WHAT TO DO IN __update_tlb()
Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
---
arch/loongarch/include/asm/cacheflush.h | 2 ++
arch/loongarch/include/asm/pgtable.h | 30 ++++++++++++++++---------
arch/loongarch/mm/tlb.c | 4 +++-
3 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/arch/loongarch/include/asm/cacheflush.h b/arch/loongarch/include/asm/cacheflush.h
index 0681788eb474..7907eb42bfbd 100644
--- a/arch/loongarch/include/asm/cacheflush.h
+++ b/arch/loongarch/include/asm/cacheflush.h
@@ -47,8 +47,10 @@ void local_flush_icache_range(unsigned long start, unsigned long end);
#define flush_cache_vmap(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
#define flush_icache_page(vma, page) do { } while (0)
+#define flush_icache_pages(vma, page) do { } while (0)
#define flush_icache_user_page(vma, page, addr, len) do { } while (0)
#define flush_dcache_page(page) do { } while (0)
+#define flush_dcache_folio(folio) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/asm/pgtable.h
index d28fb9dbec59..0f5fa7c40c52 100644
--- a/arch/loongarch/include/asm/pgtable.h
+++ b/arch/loongarch/include/asm/pgtable.h
@@ -334,12 +334,20 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
}
}
-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
- pte_t *ptep, pte_t pteval)
-{
- set_pte(ptep, pteval);
+static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
+ pte_t *ptep, pte_t pte, unsigned int nr)
+{
+ for (;;) {
+ set_pte(ptep, pte);
+ if (--nr == 0)
+ break;
+ ptep++;
+ pte_val(pte) += 1 << _PFN_SHIFT;
+ }
}
+#define set_pte_at(mm, addr, ptep, pte) set_ptes(mm, addr, ptep, pte, 1)
+
static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
/* Preserve global status for the pair */
@@ -442,14 +450,16 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
(pgprot_val(newprot) & ~_PAGE_CHG_MASK));
}
-extern void __update_tlb(struct vm_area_struct *vma,
- unsigned long address, pte_t *ptep);
+extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
+ pte_t *ptep, unsigned int nr);
-static inline void update_mmu_cache(struct vm_area_struct *vma,
- unsigned long address, pte_t *ptep)
+static inline void update_mmu_cache_range(struct vm_area_struct *vma,
+ unsigned long address, pte_t *ptep, unsigned int nr)
{
- __update_tlb(vma, address, ptep);
+ __update_tlb(vma, address, ptep, nr);
}
+#define update_mmu_cache(vma, addr, ptep) \
+ update_mmu_cache_range(vma, addr, ptep, 1)
#define __HAVE_ARCH_UPDATE_MMU_TLB
#define update_mmu_tlb update_mmu_cache
@@ -457,7 +467,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
unsigned long address, pmd_t *pmdp)
{
- __update_tlb(vma, address, (pte_t *)pmdp);
+ __update_tlb(vma, address, (pte_t *)pmdp, 1);
}
static inline unsigned long pmd_pfn(pmd_t pmd)
diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c
index 8bad6b0cff59..ac0b19dbd1dc 100644
--- a/arch/loongarch/mm/tlb.c
+++ b/arch/loongarch/mm/tlb.c
@@ -162,7 +162,8 @@ static void __update_hugetlb(struct vm_area_struct *vma, unsigned long address,
#endif
}
-void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address,
+ pte_t *ptep, unsigned int nr)
{
int idx;
unsigned long flags;
@@ -187,6 +188,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t *ptep
write_csr_entryhi(address);
tlb_probe();
idx = read_csr_tlbidx();
+// I have no idea what to do here
write_csr_pagesize(PS_DEFAULT_SIZE);
write_csr_entrylo0(pte_val(*ptep++));
write_csr_entrylo1(pte_val(*ptep));
--
2.39.1
next prev parent reply other threads:[~2023-02-15 0:05 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-11 3:39 [PATCH 0/7] New arch interfaces for manipulating multiple pages Matthew Wilcox (Oracle)
2023-02-11 3:39 ` [PATCH 1/7] mm: Convert page_table_check_pte_set() to page_table_check_ptes_set() Matthew Wilcox (Oracle)
2023-02-11 3:39 ` [PATCH 2/7] mm: Add generic flush_icache_pages() and documentation Matthew Wilcox (Oracle)
2023-02-11 3:39 ` [PATCH 3/7] mm: Add folio_flush_mapping() Matthew Wilcox (Oracle)
2023-02-11 3:39 ` [PATCH 4/7] mm: Remove ARCH_IMPLEMENTS_FLUSH_DCACHE_FOLIO Matthew Wilcox (Oracle)
2023-02-12 15:51 ` Mike Rapoport
2023-02-12 23:59 ` Matthew Wilcox
2023-02-11 3:39 ` [PATCH 5/7] alpha: Implement the new page table range API Matthew Wilcox (Oracle)
2023-02-13 3:15 ` Yin, Fengwei
2023-02-11 3:39 ` [PATCH 6/7] arc: " Matthew Wilcox (Oracle)
2023-02-13 3:09 ` Yin, Fengwei
2023-02-13 15:16 ` Matthew Wilcox
2023-02-14 6:32 ` Yin, Fengwei
2023-02-11 3:39 ` [PATCH 7/7] x86: " Matthew Wilcox (Oracle)
2023-02-13 21:04 ` [PATCH 8/7] arm: " Matthew Wilcox (Oracle)
2023-02-15 0:04 ` [PATCH 9/7] arm64: " Matthew Wilcox (Oracle)
2023-02-15 0:04 ` [PATCH 10/7] riscv: " Matthew Wilcox (Oracle)
2023-02-15 8:38 ` Yin, Fengwei
2023-02-15 12:27 ` Yin, Fengwei
2023-02-16 8:14 ` Alexandre Ghiti
2023-02-16 13:27 ` Yin, Fengwei
2023-02-16 8:16 ` Alexandre Ghiti
2023-02-15 0:04 ` [PATCH 11/7] csky: " Matthew Wilcox (Oracle)
2023-02-15 0:04 ` [PATCH 12/7] hexagon: " Matthew Wilcox (Oracle)
2023-02-15 16:22 ` Brian Cain
2023-02-15 0:04 ` Matthew Wilcox (Oracle) [this message]
2023-02-26 4:34 ` [PATCH 13/7] loongson: " Matthew Wilcox
2023-02-26 6:56 ` WANG Xuerui
2023-02-15 13:26 ` [PATCH 9/7] arm64: " Catalin Marinas
2023-02-15 20:09 ` [PATCH 14/17] ia64: " Matthew Wilcox (Oracle)
2023-02-15 20:09 ` [PATCH 15/17] m68k: " Matthew Wilcox (Oracle)
2023-02-16 0:59 ` Michael Schmitz
2023-02-16 4:26 ` Matthew Wilcox
2023-02-16 7:55 ` Geert Uytterhoeven
2023-02-16 22:03 ` Michael Schmitz
2023-02-15 20:09 ` [PATCH 16/17] microblaze: " Matthew Wilcox (Oracle)
2023-02-15 20:09 ` [PATCH 17/17] mips: " Matthew Wilcox (Oracle)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230215000446.1655635-5-willy@infradead.org \
--to=willy@infradead.org \
--cc=chenhuacai@kernel.org \
--cc=kernel@xen0n.name \
--cc=linux-arch@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=loongarch@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).