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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	 Andrew Morton <akpm@linux-foundation.org>,
	Marc Zyngier <maz@kernel.org>,
	 Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,  Oleg Nesterov <oleg@redhat.com>,
	Eric Biederman <ebiederm@xmission.com>,
	 Kees Cook <keescook@chromium.org>, Shuah Khan <shuah@kernel.org>,
	 "Rick P. Edgecombe" <rick.p.edgecombe@intel.com>,
	 Deepak Gupta <debug@rivosinc.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	 Szabolcs Nagy <Szabolcs.Nagy@arm.com>
Cc: "H.J. Lu" <hjl.tools@gmail.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	 kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org,
	 linux-arch@vger.kernel.org, linux-mm@kvack.org,
	 linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-riscv@lists.infradead.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v5 23/37] arm64/signal: Set up and restore the GCS context for signal handlers
Date: Tue, 22 Aug 2023 14:56:56 +0100	[thread overview]
Message-ID: <20230822-arm64-gcs-v5-23-9ef181dd6324@kernel.org> (raw)
In-Reply-To: <20230822-arm64-gcs-v5-0-9ef181dd6324@kernel.org>

When invoking a signal handler we use the GCS configuration and stack
for the current thread.

Since we implement signal return by calling the signal handler with a
return address set up pointing to a trampoline in the vDSO we need to
also configure any active GCS for this by pushing a frame for the
trampoline onto the GCS.  If we do not do this then signal return will
generate a GCS protection fault.

In order to guard against attempts to bypass GCS protections via signal
return we only allow returning with GCSPR_EL0 pointing to an address
where it was previously preempted by a signal.  We do this by pushing a
cap onto the GCS, this takes the form of an architectural GCS cap token
with the top bit set which we add on signal entry and validate and pop
off on signal return.  Since the top bit is set address validation for
the token will fail if an attempt is made to use it with the stack
switch instructions.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/gcs.h |   2 +
 arch/arm64/kernel/signal.c   | 130 +++++++++++++++++++++++++++++++++++++++++--
 arch/arm64/mm/gcs.c          |   1 +
 3 files changed, 128 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/gcs.h b/arch/arm64/include/asm/gcs.h
index c150e76869a1..65496103d462 100644
--- a/arch/arm64/include/asm/gcs.h
+++ b/arch/arm64/include/asm/gcs.h
@@ -8,6 +8,8 @@
 #include <asm/types.h>
 #include <asm/uaccess.h>
 
+struct ksignal;
+
 static inline void gcsb_dsync(void)
 {
 	asm volatile(".inst 0xd503227f" : : : "memory");
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index 0e8beb3349ea..97004c52aea3 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -25,6 +25,7 @@
 #include <asm/elf.h>
 #include <asm/exception.h>
 #include <asm/cacheflush.h>
+#include <asm/gcs.h>
 #include <asm/ucontext.h>
 #include <asm/unistd.h>
 #include <asm/fpsimd.h>
@@ -34,6 +35,36 @@
 #include <asm/traps.h>
 #include <asm/vdso.h>
 
+#ifdef CONFIG_ARM64_GCS
+/* Extra bit set in the address distinguishing a signal cap token. */
+#define GCS_SIGNAL_CAP_FLAG BIT(63)
+
+#define GCS_SIGNAL_CAP(addr) (GCS_CAP(addr) | GCS_SIGNAL_CAP_FLAG)
+
+static bool gcs_signal_cap_valid(u64 addr, u64 val)
+{
+	/*
+	 * The top bit should be set, this is an invalid address for
+	 * EL0 and will only be set for caps created by signals.
+	 */
+	if (!(val & GCS_SIGNAL_CAP_FLAG))
+		return false;
+
+	/* The rest should be a standard architectural cap token. */
+	val &= ~GCS_SIGNAL_CAP_FLAG;
+
+	/* The cap must have the low bits set to a token value */
+	if (GCS_CAP_TOKEN(val) != GCS_CAP_VALID_TOKEN)
+		return false;
+
+	/* The cap must store the VA the cap was stored at */
+	if (GCS_CAP_ADDR(addr) != GCS_CAP_ADDR(val))
+		return false;
+
+	return true;
+}
+#endif
+
 /*
  * Do a signal return; undo the signal stack. These are aligned to 128-bit.
  */
@@ -815,6 +846,45 @@ static int restore_sigframe(struct pt_regs *regs,
 	return err;
 }
 
+#ifdef CONFIG_ARM64_GCS
+static int gcs_restore_signal(void)
+{
+	u64 gcspr_el0, cap;
+	int ret;
+
+	if (!system_supports_gcs())
+		return 0;
+
+	if (!(current->thread.gcs_el0_mode & PR_SHADOW_STACK_ENABLE))
+		return 0;
+
+	gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);
+
+	/*
+	 * GCSPR_EL0 should be pointing at a capped GCS, read the cap...
+	 */
+	gcsb_dsync();
+	ret = copy_from_user(&cap, (__user void*)gcspr_el0, sizeof(cap));
+	if (ret)
+		return -EFAULT;
+
+	/*
+	 * ...then check that the cap is the actual GCS before
+	 * restoring it.
+	 */
+	if (!gcs_signal_cap_valid(gcspr_el0, cap))
+		return -EINVAL;
+
+	current->thread.gcspr_el0 = gcspr_el0 + sizeof(cap);
+	write_sysreg_s(current->thread.gcspr_el0, SYS_GCSPR_EL0);
+
+	return 0;
+}
+
+#else
+static int gcs_restore_signal(void) { return 0; }
+#endif
+
 SYSCALL_DEFINE0(rt_sigreturn)
 {
 	struct pt_regs *regs = current_pt_regs();
@@ -841,6 +911,9 @@ SYSCALL_DEFINE0(rt_sigreturn)
 	if (restore_altstack(&frame->uc.uc_stack))
 		goto badframe;
 
+	if (gcs_restore_signal())
+		goto badframe;
+
 	return regs->regs[0];
 
 badframe:
@@ -1071,7 +1144,52 @@ static int get_sigframe(struct rt_sigframe_user_layout *user,
 	return 0;
 }
 
-static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
+#ifdef CONFIG_ARM64_GCS
+
+static int gcs_signal_entry(__sigrestore_t sigtramp, struct ksignal *ksig)
+{
+	unsigned long __user *gcspr_el0;
+	unsigned long cap[2];
+	int ret;
+
+	if (!system_supports_gcs())
+		return 0;
+
+	if (!task_gcs_el0_enabled(current))
+		return 0;
+
+	/*
+	 * We are entering a signal handler, current register state is
+	 * active.
+	 */
+	gcspr_el0 = (unsigned long __user *)read_sysreg_s(SYS_GCSPR_EL0);
+
+	/*
+	 * Push a cap and the GCS entry for the trampoline onto the GCS.
+	 */
+	cap[1] = GCS_SIGNAL_CAP(gcspr_el0 - 1);
+	cap[0] = (unsigned long)sigtramp;
+	ret = copy_to_user_gcs(gcspr_el0 - 2, cap, ARRAY_SIZE(cap));
+	if (ret != 0)
+		return ret;
+
+	gcsb_dsync();
+
+	gcspr_el0 -= 2;
+	write_sysreg_s((unsigned long)gcspr_el0, SYS_GCSPR_EL0);
+
+	return 0;
+}
+#else
+
+static int gcs_signal_entry(__sigrestore_t sigtramp, struct ksignal *ksig)
+{
+	return 0;
+}
+
+#endif
+
+static int setup_return(struct pt_regs *regs, struct ksignal *ksig,
 			 struct rt_sigframe_user_layout *user, int usig)
 {
 	__sigrestore_t sigtramp;
@@ -1079,7 +1197,7 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 	regs->regs[0] = usig;
 	regs->sp = (unsigned long)user->sigframe;
 	regs->regs[29] = (unsigned long)&user->next_frame->fp;
-	regs->pc = (unsigned long)ka->sa.sa_handler;
+	regs->pc = (unsigned long)ksig->ka.sa.sa_handler;
 
 	/*
 	 * Signal delivery is a (wacky) indirect function call in
@@ -1119,12 +1237,14 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 		sme_smstop();
 	}
 
-	if (ka->sa.sa_flags & SA_RESTORER)
-		sigtramp = ka->sa.sa_restorer;
+	if (ksig->ka.sa.sa_flags & SA_RESTORER)
+		sigtramp = ksig->ka.sa.sa_restorer;
 	else
 		sigtramp = VDSO_SYMBOL(current->mm->context.vdso, sigtramp);
 
 	regs->regs[30] = (unsigned long)sigtramp;
+
+	return gcs_signal_entry(sigtramp, ksig);
 }
 
 static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
@@ -1147,7 +1267,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
 	err |= __save_altstack(&frame->uc.uc_stack, regs->sp);
 	err |= setup_sigframe(&user, regs, set);
 	if (err == 0) {
-		setup_return(regs, &ksig->ka, &user, usig);
+		err = setup_return(regs, ksig, &user, usig);
 		if (ksig->ka.sa.sa_flags & SA_SIGINFO) {
 			err |= copy_siginfo_to_user(&frame->info, &ksig->info);
 			regs->regs[1] = (unsigned long)&frame->info;
diff --git a/arch/arm64/mm/gcs.c b/arch/arm64/mm/gcs.c
index 2963041d1d64..6251c362a7f9 100644
--- a/arch/arm64/mm/gcs.c
+++ b/arch/arm64/mm/gcs.c
@@ -6,6 +6,7 @@
 #include <linux/types.h>
 
 #include <asm/cpufeature.h>
+#include <asm/gcs.h>
 #include <asm/page.h>
 
 static unsigned long alloc_gcs(unsigned long addr, unsigned long size,

-- 
2.30.2



  parent reply	other threads:[~2023-08-22 14:05 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-22 13:56 [PATCH v5 00/37] arm64/gcs: Provide support for GCS in userspace Mark Brown
2023-08-22 13:56 ` [PATCH v5 01/37] arm64/mm: Restructure arch_validate_flags() for extensibility Mark Brown
2023-08-22 13:56 ` [PATCH v5 02/37] prctl: arch-agnostic prctl for shadow stack Mark Brown
2023-08-22 13:56 ` [PATCH v5 03/37] arm64: Document boot requirements for Guarded Control Stacks Mark Brown
2023-08-22 13:56 ` [PATCH v5 04/37] arm64/gcs: Document the ABI " Mark Brown
2023-08-22 15:05   ` Szabolcs Nagy
2023-08-22 13:56 ` [PATCH v5 05/37] arm64/sysreg: Add new system registers for GCS Mark Brown
2023-08-22 13:56 ` [PATCH v5 06/37] arm64/sysreg: Add definitions for architected GCS caps Mark Brown
2023-08-22 13:56 ` [PATCH v5 07/37] arm64/gcs: Add manual encodings of GCS instructions Mark Brown
2023-08-22 13:56 ` [PATCH v5 08/37] arm64/gcs: Provide copy_to_user_gcs() Mark Brown
2023-08-22 13:56 ` [PATCH v5 09/37] arm64/cpufeature: Runtime detection of Guarded Control Stack (GCS) Mark Brown
2023-08-22 13:56 ` [PATCH v5 10/37] arm64/mm: Allocate PIE slots for EL0 guarded control stack Mark Brown
2023-08-22 13:56 ` [PATCH v5 11/37] mm: Define VM_SHADOW_STACK for arm64 when we support GCS Mark Brown
2023-08-22 15:21   ` David Hildenbrand
2023-08-22 15:41     ` Mark Brown
2023-08-22 16:47       ` Edgecombe, Rick P
2023-08-22 17:55         ` Mark Brown
2023-08-22 13:56 ` [PATCH v5 12/37] arm64/mm: Map pages for guarded control stack Mark Brown
2023-08-22 13:56 ` [PATCH v5 13/37] KVM: arm64: Manage GCS registers for guests Mark Brown
2023-08-22 13:56 ` [PATCH v5 14/37] arm64/gcs: Allow GCS usage at EL0 and EL1 Mark Brown
2023-08-22 13:56 ` [PATCH v5 15/37] arm64/idreg: Add overrride for GCS Mark Brown
2023-08-22 13:56 ` [PATCH v5 16/37] arm64/hwcap: Add hwcap " Mark Brown
2023-08-22 13:56 ` [PATCH v5 17/37] arm64/traps: Handle GCS exceptions Mark Brown
2023-08-22 13:56 ` [PATCH v5 18/37] arm64/mm: Handle GCS data aborts Mark Brown
2023-08-22 13:56 ` [PATCH v5 19/37] arm64/gcs: Context switch GCS state for EL0 Mark Brown
2023-08-22 13:56 ` [PATCH v5 20/37] arm64/gcs: Allocate a new GCS for threads with GCS enabled Mark Brown
2023-08-22 13:56 ` [PATCH v5 21/37] arm64/gcs: Implement shadow stack prctl() interface Mark Brown
2023-08-22 13:56 ` [PATCH v5 22/37] arm64/mm: Implement map_shadow_stack() Mark Brown
2023-08-22 13:56 ` Mark Brown [this message]
2023-08-22 13:56 ` [PATCH v5 24/37] arm64/signal: Expose GCS state in signal frames Mark Brown
2023-08-22 13:56 ` [PATCH v5 25/37] arm64/ptrace: Expose GCS via ptrace and core files Mark Brown
2023-08-22 13:56 ` [PATCH v5 26/37] arm64: Add Kconfig for Guarded Control Stack (GCS) Mark Brown
2023-08-22 13:57 ` [PATCH v5 27/37] kselftest/arm64: Verify the GCS hwcap Mark Brown
2023-08-22 13:57 ` [PATCH v5 28/37] kselftest/arm64: Add GCS as a detected feature in the signal tests Mark Brown
2023-08-22 13:57 ` [PATCH v5 29/37] kselftest/arm64: Add framework support for GCS to signal handling tests Mark Brown
2023-08-22 13:57 ` [PATCH v5 30/37] kselftest/arm64: Allow signals tests to specify an expected si_code Mark Brown
2023-08-22 13:57 ` [PATCH v5 31/37] kselftest/arm64: Always run signals tests with GCS enabled Mark Brown
2023-08-22 13:57 ` [PATCH v5 32/37] kselftest/arm64: Add very basic GCS test program Mark Brown
2023-08-22 13:57 ` [PATCH v5 33/37] kselftest/arm64: Add a GCS test program built with the system libc Mark Brown
2023-08-22 13:57 ` [PATCH v5 34/37] kselftest/arm64: Add test coverage for GCS mode locking Mark Brown
2023-08-22 13:57 ` [PATCH v5 35/37] selftests/arm64: Add GCS signal tests Mark Brown
2023-08-22 13:57 ` [PATCH v5 36/37] kselftest/arm64: Add a GCS stress test Mark Brown
2023-08-22 13:57 ` [PATCH v5 37/37] kselftest/arm64: Enable GCS for the FP stress tests Mark Brown

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