Re: [PATCH v5 00/12] AMD broadcast TLB invalidation

Peter Zijlstra
2025-01-21T10:45:24Z

On Fri, Jan 17, 2025 at 12:00:33AM +0000, Andrew Cooper wrote:
> On 16/01/2025 10:37 pm, Peter Zijlstra wrote:
> > On Thu, Jan 16, 2025 at 06:14:00PM +0000, Michael Kelley wrote:
> >> So CoCo
> >> VMs may still use the paravirtualization that makes hypercalls to do
> >> TLB flushes. It's future work to *always* use INVLPGB (if available)
> >> in a CoCo VM.
> > That would place a limit on the number of CPUs, to be no larger than the
> > number of available ASIDs.
>
> Can you please be specific between PCID (the x86 architectural thing
> commonly called ASID) or ASID (the thing named by the AMD architecture).
>
> INVLPGB instruction under virt can use PCIDs to its hearts content, but
> ASIDs are rewritten behind the scenes because VM does not usually know
> the ASID the VMM assigned to it.

Sorry, I had to re-read the documents again to find out what you were
talking about since I habitually skip all virt bits when reading.

Urgh @ AMD for adding ASID, although I think I understand what they're
doing.

Anyway, PCID, the thing commonly called ASID by pretty much all other
architectures using broadcast TLBI.

Since ASIDs be global and independent execution of CPUs means you then
need at least one ASID per CPU (when they're all running a different
process), you must not have more CPUs than available ASIDs, or you're
into trouble.

Since PCID space is 12 bits, we cannot have more than 4k CPUs (minus a
few for that other PCID crap we do), or half that when PTI.

And while that sounds like a lot -- its getting easier to hit every
passing year, we're having how many CPUs on a single Epyc now? 192*2 or
somesuch nonsense IIRC.

So if someone wants to mandate Broadcast TLBI, someone needs to figure
out what to do when we hit this limit.