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imf29.hostedemail.com; dkim=none; spf=pass (imf29.hostedemail.com: domain of dev.jain@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=dev.jain@arm.com; dmarc=pass (policy=none) header.from=arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1748595889; a=rsa-sha256; cv=none; b=b6hBd0PlHLJsBNiOytwRY/i5GJrYLpKjWM88qGsa7kdWynC7mDnHAU1V9dTAKW/LuPWtdV EZvgFsZKveI1HVDdUMwUkaVfvpAS++wV/GWu+nxaC8klyDnT3N1imHxXzVAs0OhSgzjqUo iDeUc4ozwoUbGbrvn6+iqsTEoLJ65K8= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DBC9516F2; Fri, 30 May 2025 02:04:31 -0700 (PDT) Received: from MacBook-Pro.blr.arm.com (unknown [10.164.18.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4A0CF3F5A1; Fri, 30 May 2025 02:04:43 -0700 (PDT) From: Dev Jain To: akpm@linux-foundation.org, david@redhat.com, catalin.marinas@arm.com, will@kernel.org Cc: lorenzo.stoakes@oracle.com, Liam.Howlett@oracle.com, vbabka@suse.cz, rppt@kernel.org, surenb@google.com, mhocko@suse.com, linux-mm@kvack.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, steven.price@arm.com, gshan@redhat.com, linux-arm-kernel@lists.infradead.org, Dev Jain Subject: [PATCH 3/3] mm/pagewalk: Add pre/post_pte_table callback for lazy MMU on arm64 Date: Fri, 30 May 2025 14:34:07 +0530 Message-Id: <20250530090407.19237-4-dev.jain@arm.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20250530090407.19237-1-dev.jain@arm.com> References: <20250530090407.19237-1-dev.jain@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: E4C5D12000A X-Stat-Signature: jtoiot1hb1pqyc5tk8gntmaks3mn9xaa X-Rspam-User: X-HE-Tag: 1748595888-932840 X-HE-Meta: U2FsdGVkX18/wPwiqDMUZeOUuDasavI5U4UV0BwLtyuxYF2ZoBhQsSf+JyqabU8AIYLpbGqCLPj/xQhtZInOEfoGvTXM3w8uChmAZKMWX7MjFIceEDcMUlroWxpV+Q4915QqTQKjaDEU3YVrq0WEGmgPRIvXOBo27LSVpM9qnMlu627lpCon6gkaKwx8UVL0/13ACkXYeRjwNEwNpI7LjbUSYnEQdDh/H6tXua/pxdThpAkLCh9WnKioEjkcf9+H4IAfe+RGzNNFBtdx20x+tpmJ+eLXAkebUyBrfPPoYTVfB4Yk1nFGKw7DoIkORhcA8Sp+Vd2kuJXWYWN7OxKp9tApdXCyWaHNgqzQkGYG2QFXD1f6mhBx9nx7mzx4M0KKT8S/LVaNiy1qSrdPPeZcGPhPmjvWXX32/8q2ERp5k2y+wQaNtkaSa/nVqmb18EilUv4990lhVvquWLZf7fdKJSolZsTUyTLlfjJD+1ZuY+JgBUzPAaPU9eA6WPAr441PGWmhOxqrbVBS+vvCeY2Okab1I/fUESCDpHnyJTbcm3+OQHe3kBqLaqcooKDUcTX10gPdn7FUG0bWDY/8qkzTWFf21MKuWDMQ6cNCOSHQPwKgnLSsgMkVhHb68qz11j/vJNpSLmdkSNSoKObnSPXHFdT+NFACBRI00n9pl+dqG3aqIQ7nVONmEupoLhUVyyut8a2ZaY0Wbz/KjB0QfG4plXJbZUTnnjtXUdsKtrZsmJYtzfXX8KZP6TpOafoxMhbhPhknfiU+FDIozcg9dSqYDV0gHcf3FmeCIP7Sj3pHR0vE+oAoEsI0Pv7tO9UPPPAuXyo3M+o9W4vyGo2hm9JTeJITNuw4eGe2zjrif7Jgb2rv1gcJYEhIc0k80ZJJzRvpDPG4xn30D8z4w5LFtfsng8UFcTkKnMzMoW02lv4bSCJT5PwvGkUiMkvu0ZYqrNTRaQiNHnJ6VatVjNnaxer FjQ2eWfv 7vkmp9ZJSW3jFNl+Y1hIqGZgFbNuHWdBCBojfyq7MOUvuD4DfyNZfAgWlmGYEaBONHRz1LRcpH3y7diEadGsiAXdiwfR2A0RBLmvnD4IArfwzqeorFgFPsHmtJUPCgUdYVk5G1OfkbPuvbSSO2iBPqWbymE4VllmG+homDzZt9Pn6YIc/v31v0kLNMivN2GkD5+jvHpnz9mHkRU4= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: arm64 implements lazy_mmu_mode to allow deferral and batching of barriers when updating kernel PTEs, which provides a nice performance boost. arm64 currently uses apply_to_page_range() to modify kernel PTE permissions, which runs inside lazy_mmu_mode. So to prevent a performance regression, let's add hooks to walk_page_range_novma() to allow continued use of lazy_mmu_mode. Signed-off-by: Dev Jain --- Credits to Ryan for the patch description. arch/arm64/mm/pageattr.c | 12 ++++++++++++ include/linux/pagewalk.h | 2 ++ mm/pagewalk.c | 6 ++++++ 3 files changed, 20 insertions(+) diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c index a5c829c64969..9163324b12a0 100644 --- a/arch/arm64/mm/pageattr.c +++ b/arch/arm64/mm/pageattr.c @@ -75,11 +75,23 @@ static int pageattr_pte_entry(pte_t *pte, unsigned long addr, return 0; } +static void pte_lazy_mmu_enter(void) +{ + arch_enter_lazy_mmu_mode(); +} + +static void pte_lazy_mmu_leave(void) +{ + arch_leave_lazy_mmu_mode(); +} + static const struct mm_walk_ops pageattr_ops = { .pud_entry = pageattr_pud_entry, .pmd_entry = pageattr_pmd_entry, .pte_entry = pageattr_pte_entry, .walk_lock = PGWALK_NOLOCK, + .pre_pte_table = pte_lazy_mmu_enter, + .post_pte_table = pte_lazy_mmu_leave, }; bool rodata_full __ro_after_init = IS_ENABLED(CONFIG_RODATA_FULL_DEFAULT_ENABLED); diff --git a/include/linux/pagewalk.h b/include/linux/pagewalk.h index 9bc8853ed3de..2157d345974c 100644 --- a/include/linux/pagewalk.h +++ b/include/linux/pagewalk.h @@ -88,6 +88,8 @@ struct mm_walk_ops { int (*pre_vma)(unsigned long start, unsigned long end, struct mm_walk *walk); void (*post_vma)(struct mm_walk *walk); + void (*pre_pte_table)(void); + void (*post_pte_table)(void); int (*install_pte)(unsigned long addr, unsigned long next, pte_t *ptep, struct mm_walk *walk); enum page_walk_lock walk_lock; diff --git a/mm/pagewalk.c b/mm/pagewalk.c index 9657cf4664b2..a441f5cbbc45 100644 --- a/mm/pagewalk.c +++ b/mm/pagewalk.c @@ -33,6 +33,9 @@ static int walk_pte_range_inner(pte_t *pte, unsigned long addr, const struct mm_walk_ops *ops = walk->ops; int err = 0; + if (walk->ops->pre_pte_table) + walk->ops->pre_pte_table(); + for (;;) { if (ops->install_pte && pte_none(ptep_get(pte))) { pte_t new_pte; @@ -56,6 +59,9 @@ static int walk_pte_range_inner(pte_t *pte, unsigned long addr, addr += PAGE_SIZE; pte++; } + + if (walk->ops->post_pte_table) + walk->ops->post_pte_table(); return err; } -- 2.30.2