* [linux-next:master] BUILD SUCCESS WITH WARNING 4325743c7e209ae7845293679a4de94b969f2bef
@ 2025-06-17 19:22 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2025-06-17 19:22 UTC (permalink / raw)
To: Andrew Morton; +Cc: Linux Memory Management List
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 4325743c7e209ae7845293679a4de94b969f2bef Add linux-next specific files for 20250617
Warning (recently discovered and may have been fixed):
https://lore.kernel.org/oe-kbuild-all/202505270309.E7vPrW5P-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202505291839.0DExyOBY-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202505300337.V5fnqtr3-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202505310032.U32J7l8z-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202505310609.5RZg4pDn-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202505311156.VMtrBeWr-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202505311248.tP7w1pA5-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506010242.qKzuFlI0-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506041952.baJDYBT4-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506101656.WXufYKsj-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506120010.6OynxJRk-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506120036.oCLAYYbS-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506120158.gAv9jVB9-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506120728.z4ASess3-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506122306.3fmBVDue-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506140157.52eLZFNo-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506141133.AEQRFOWe-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506151907.LcLf1RIB-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506162214.1eA69hLe-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202506172312.ujaGUTpC-lkp@intel.com
https://lore.kernel.org/oe-kbuild/202506162154.z0OrePAP-lkp@intel.com
Warning: fs/nfsd/filecache.c:381 function parameter 'pnf' not described in 'nfsd_file_put_local'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: adc@1e6e9000 (aspeed,ast2600-adc0): 'interrupts' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: adc@1e6e9100 (aspeed,ast2600-adc1): 'interrupts' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: bus@1e600000 (aspeed,ast2600-ahbc): compatible: ['aspeed,ast2600-ahbc', 'syscon'] is too long
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: crypto@1e6fa000 (aspeed,ast2600-acry): 'aspeed,ahbc' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: fsi@1e79b000 (aspeed,ast2600-fsi-master): compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: fsi@1e79b100 (aspeed,ast2600-fsi-master): compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: kcs@24 (aspeed,ast2500-kcs-bmc-v2): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: kcs@2c (aspeed,ast2500-kcs-bmc-v2): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: lpc@1e789000 (aspeed,ast2600-lpc-v2): lpc-snoop@80: 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: lpc@1e789000 (aspeed,ast2600-lpc-v2): reg-io-width: 4 is not of type 'object'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: sdc@1e740000 (aspeed,ast2600-sd-controller): sdhci@1e740100:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: sdc@1e740000 (aspeed,ast2600-sd-controller): sdhci@1e740200:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: syscon@1e6e2000 (aspeed,ast2600-scu): 'smp-memram@180' does not match any of the regexes: '^interrupt-controller@[0-9a-f]+$', '^p2a-control@[0-9a-f]+$', '^pinctrl(@[0-9a-f]+)?$', '^pinctrl-[0-9]+$', '^silicon-id@[0-9a-f]+$'
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dtb: timer (arm,armv7-timer): 'clocks' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: amba (simple-bus): $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: base_fpga_region (fpga-region): $nodename:0: 'base_fpga_region' does not match '^fpga-region(@.*|-([0-9]|[1-9][0-9]+))?$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: f2s_periph_ref_clk (fixed-clock): 'clock-frequency' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: f2s_sdram_ref_clk (fixed-clock): 'clock-frequency' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: fpga_bridge@ff400000 (altr,socfpga-lwhps2fpga-bridge): $nodename:0: 'fpga_bridge@ff400000' does not match '^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: fpga_bridge@ff500000 (altr,socfpga-hps2fpga-bridge): $nodename:0: 'fpga_bridge@ff500000' does not match '^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: osc2 (fixed-clock): 'clock-frequency' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: pdma@ffe01000 (arm,pl330): $nodename:0: 'pdma@ffe01000' does not match '^dma-controller(@.*)?$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: pmu@ff111000 (arm,cortex-a9-pmu): 'reg' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: soc (simple-bus): base_fpga_region: 'ranges' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: soc (simple-bus): sdramedac: 'ranges' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: soc (simple-bus): stmmac-axi-config: 'ranges' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: soc (simple-bus): usbphy: 'ranges' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: spi@ff705000 (intel,socfpga-qspi): resets: [[6, 37]] is too short
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: sram@ffff0000 (mmio-sram): '#address-cells' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: sram@ffff0000 (mmio-sram): '#size-cells' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: sram@ffff0000 (mmio-sram): 'ranges' is a required property
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: sysmgr@ffd08000 (altr,sys-mgr): compatible: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: timer0@ffc08000 (snps,dw-apb-timer): 'reset-names' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: timer1@ffc09000 (snps,dw-apb-timer): 'reset-names' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: timer2@ffd00000 (snps,dw-apb-timer): 'reset-names' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dtb: timer3@ffd01000 (snps,dw-apb-timer): 'reset-names' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm/boot/dts/nxp/lpc/lpc3250-ea3250.dtb: memory-controller@31080000 (arm,pl175): #address-cells: 2 was expected
arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: memory-controller@31080000 (arm,pl175): #address-cells: 2 was expected
arch/arm/boot/dts/vt8500/vt8500-bv07.dtb: /soc/lcd-controller@d800e400: failed to match any schema with compatible: ['via,vt8500-fb']
arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: pcie@1000120000 (brcm,bcm2712-pcie): Unevaluated properties are not allowed ('rp1_nexus' was unexpected)
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: axi (simple-bus): gpu: 'ranges' is a required property
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: firmware (raspberrypi,bcm2835-firmware): '#address-cells', '#size-cells', 'dma-ranges' do not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c701400 (brcm,bcm2712-hdmi0): interrupt-names: ['cec-tx', 'cec-rx', 'cec-low', 'hpd-connected', 'hpd-removed'] is too short
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c701400 (brcm,bcm2712-hdmi0): interrupt-names:3: 'wakeup' was expected
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c701400 (brcm,bcm2712-hdmi0): interrupt-names:4: 'hpd-connected' was expected
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c701400 (brcm,bcm2712-hdmi0): interrupts: [[1], [2], [3], [7], [8]] is too short
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c706400 (brcm,bcm2712-hdmi1): interrupt-names: ['cec-tx', 'cec-rx', 'cec-low', 'hpd-connected', 'hpd-removed'] is too short
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c706400 (brcm,bcm2712-hdmi1): interrupt-names:3: 'wakeup' was expected
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c706400 (brcm,bcm2712-hdmi1): interrupt-names:4: 'hpd-connected' was expected
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hdmi@7c706400 (brcm,bcm2712-hdmi1): interrupts: [[11], [12], [13], [14], [15]] is too short
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hvs@107c580000 (brcm,bcm2712-hvs): 'clock-names', 'interrupt-names' do not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hvs@107c580000 (brcm,bcm2712-hvs): clocks: [[18, 4], [18, 16]] is too long
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hvs@107c580000 (brcm,bcm2712-hvs): interrupts: [[2], [9], [16]] is too long
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: soc@107c000000 (simple-bus): firmware: 'ranges' is a required property
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: soc@107c000000 (simple-bus): power: 'ranges' is a required property
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: pcie@1000120000 (brcm,bcm2712-pcie): Unevaluated properties are not allowed ('rp1_nexus' was unexpected)
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: nand-controller@10b80000 (cdns,hp-nfc): 'clock-names' is a required property
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-evb.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8192-evb.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8195-cherry-dojo-r1.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8195-demo.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@15110000 (mediatek,mt8188-imgsys1-dip-top): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@15130000 (mediatek,mt8188-imgsys1-dip-nr): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@15220000 (mediatek,mt8188-imgsys-wpe1): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@15330000 (mediatek,mt8188-ipesys): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@15520000 (mediatek,mt8188-imgsys-wpe2): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@15620000 (mediatek,mt8188-imgsys-wpe3): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@1604f000 (mediatek,mt8188-camsys-rawa): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@1606f000 (mediatek,mt8188-camsys-yuva): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@1608f000 (mediatek,mt8188-camsys-rawb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: clock-controller@160af000 (mediatek,mt8188-camsys-yuvb): '#reset-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dtb: pmic (mediatek,mt6359): '#sound-dai-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtb: pmic@2 (qcom,pm8350c): pwm:nvmem: [[355, 356]] is too short
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtb: pwm (qcom,pm8350c-pwm): nvmem: [[355, 356]] is too short
arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dtb: panel@0 (visionox,rm69299-shift): '#address-cells', '#size-cells' do not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): power-domains: [[106, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): power-domains: [[106, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-qrd.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8450-qrd.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): power-domains: [[98, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-qrd.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-qrd.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): power-domains: [[98, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-qrd.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): power-domains: [[98, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): power-domains: [[98, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): power-domains: [[98, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb: clock-controller@aaf0000 (qcom,sm8450-videocc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): power-domains: [[98, 6]] is too short
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb: clock-controller@ade0000 (qcom,sm8450-camcc): required-opps: [[55]] is too short
arch/arm64/boot/dts/qcom/sm8550-hdk.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-hdk.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-hdk.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-hdk.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-hdk.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-hdk.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-qrd.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-qrd.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-qrd.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-qrd.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-qrd.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-qrd.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dtb: clock-controller@aaf0000 (qcom,sm8550-videocc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): Unevaluated properties are not allowed ('power-domains', 'required-opps' were unexpected)
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): power-domains: [[56, 6]] is too short
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dtb: clock-controller@ade0000 (qcom,sm8550-camcc): required-opps: [[33]] is too short
arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: clock-controller@aaf0000 (qcom,sm8650-videocc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: clock-controller@ade0000 (qcom,sm8650-camcc): power-domains: [[79, 6]] is too short
arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtb: spdif-dit (linux,spdif-dit): 'port' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtb: typec-portc@22 (fcs,fusb302): 'connector' is a required property
arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2-screen.dtb: spdif-dit (linux,spdif-dit): 'port' does not match any of the regexes: '^pinctrl-[0-9]+$'
arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2-screen.dtb: typec-portc@22 (fcs,fusb302): 'connector' is a required property
kismet: WARNING: unmet direct dependencies detected for SERIAL_8250 when selected by ECONET
kismet: WARNING: unmet direct dependencies detected for STACKTRACE when selected by STACKDEPOT
Unverified Warning (likely false positive, kindly check if interested):
drivers/gpu/drm/nouveau/nvif/chan.c:38:51: sparse: sparse: incorrect type in initializer (different address spaces)
drivers/gpu/drm/nouveau/nvif/chan906f.c:82:28: sparse: sparse: incorrect type in assignment (different address spaces)
fs/dcache.c:3035 d_splice_alias_ops() warn: inconsistent returns '&inode->i_lock'.
Warning ids grouped by kconfigs:
recent_errors
|-- alpha-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- alpha-defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- arc-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- arc-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- arc-randconfig-r132-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- arm-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- arm-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- arm-randconfig-051-20250617
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9000-(aspeed-ast2600-adc0):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9100-(aspeed-ast2600-adc1):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:bus-1e600000-(aspeed-ast2600-ahbc):compatible:aspeed-ast2600-ahbc-syscon-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:crypto-1e6fa000-(aspeed-ast2600-acry):aspeed-ahbc-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b000-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b100-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-2c-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):lpc-snoop:clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):reg-io-width:is-not-of-type-object
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740100:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740200:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:syscon-1e6e2000-(aspeed-ast2600-scu):smp-memram-does-not-match-any-of-the-regexes:interrupt-controller-9a-f-p2a-control-9a-f-pinctrl(-9a-f-)
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:timer-(arm-armv7-timer):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:amba-(simple-bus):nodename:amba-does-not-match-(-a-z-a-z0-bus-bus-localbus-soc-axi-ahb-apb)(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:base_fpga_region-(fpga-region):nodename:base_fpga_region-does-not-match-fpga-region(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_periph_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_sdram_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff400000-(altr-socfpga-lwhps2fpga-bridge):nodename:fpga_bridge-ff400000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff500000-(altr-socfpga-hps2fpga-bridge):nodename:fpga_bridge-ff500000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:osc2-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pdma-ffe01000-(arm-pl330):nodename:pdma-ffe01000-does-not-match-dma-controller(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pmu-ff111000-(arm-cortex-a9-pmu):reg-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):base_fpga_region:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):sdramedac:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):stmmac-axi-config:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):usbphy:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:spi-ff705000-(intel-socfpga-qspi):resets:is-too-short
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):address-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):size-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sysmgr-ffd08000-(altr-sys-mgr):compatible:oneOf-conditional-failed-one-must-be-fixed:
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer0-ffc08000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer1-ffc09000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer2-ffd00000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer3-ffd01000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-ea3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-phy3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| `-- arch-arm-boot-dts-vt8500-vt8500-bv07.dtb:soc-lcd-controller-d800e400:failed-to-match-any-schema-with-compatible:via-vt8500-fb
|-- arm-randconfig-052-20250617
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9000-(aspeed-ast2600-adc0):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9100-(aspeed-ast2600-adc1):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:bus-1e600000-(aspeed-ast2600-ahbc):compatible:aspeed-ast2600-ahbc-syscon-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:crypto-1e6fa000-(aspeed-ast2600-acry):aspeed-ahbc-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b000-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b100-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-2c-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):lpc-snoop:clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):reg-io-width:is-not-of-type-object
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740100:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740200:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:syscon-1e6e2000-(aspeed-ast2600-scu):smp-memram-does-not-match-any-of-the-regexes:interrupt-controller-9a-f-p2a-control-9a-f-pinctrl(-9a-f-)
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:timer-(arm-armv7-timer):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:amba-(simple-bus):nodename:amba-does-not-match-(-a-z-a-z0-bus-bus-localbus-soc-axi-ahb-apb)(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:base_fpga_region-(fpga-region):nodename:base_fpga_region-does-not-match-fpga-region(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_periph_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_sdram_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff400000-(altr-socfpga-lwhps2fpga-bridge):nodename:fpga_bridge-ff400000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff500000-(altr-socfpga-hps2fpga-bridge):nodename:fpga_bridge-ff500000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:osc2-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pdma-ffe01000-(arm-pl330):nodename:pdma-ffe01000-does-not-match-dma-controller(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pmu-ff111000-(arm-cortex-a9-pmu):reg-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):base_fpga_region:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):sdramedac:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):stmmac-axi-config:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):usbphy:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:spi-ff705000-(intel-socfpga-qspi):resets:is-too-short
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):address-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):size-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sysmgr-ffd08000-(altr-sys-mgr):compatible:oneOf-conditional-failed-one-must-be-fixed:
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer0-ffc08000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer1-ffc09000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer2-ffd00000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer3-ffd01000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-ea3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-phy3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| `-- arch-arm-boot-dts-vt8500-vt8500-bv07.dtb:soc-lcd-controller-d800e400:failed-to-match-any-schema-with-compatible:via-vt8500-fb
|-- arm-randconfig-053-20250617
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9000-(aspeed-ast2600-adc0):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9100-(aspeed-ast2600-adc1):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:bus-1e600000-(aspeed-ast2600-ahbc):compatible:aspeed-ast2600-ahbc-syscon-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:crypto-1e6fa000-(aspeed-ast2600-acry):aspeed-ahbc-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b000-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b100-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-2c-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):lpc-snoop:clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):reg-io-width:is-not-of-type-object
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740100:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740200:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:syscon-1e6e2000-(aspeed-ast2600-scu):smp-memram-does-not-match-any-of-the-regexes:interrupt-controller-9a-f-p2a-control-9a-f-pinctrl(-9a-f-)
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:timer-(arm-armv7-timer):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:amba-(simple-bus):nodename:amba-does-not-match-(-a-z-a-z0-bus-bus-localbus-soc-axi-ahb-apb)(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:base_fpga_region-(fpga-region):nodename:base_fpga_region-does-not-match-fpga-region(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_periph_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_sdram_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff400000-(altr-socfpga-lwhps2fpga-bridge):nodename:fpga_bridge-ff400000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff500000-(altr-socfpga-hps2fpga-bridge):nodename:fpga_bridge-ff500000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:osc2-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pdma-ffe01000-(arm-pl330):nodename:pdma-ffe01000-does-not-match-dma-controller(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pmu-ff111000-(arm-cortex-a9-pmu):reg-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):base_fpga_region:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):sdramedac:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):stmmac-axi-config:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):usbphy:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:spi-ff705000-(intel-socfpga-qspi):resets:is-too-short
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):address-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):size-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sysmgr-ffd08000-(altr-sys-mgr):compatible:oneOf-conditional-failed-one-must-be-fixed:
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer0-ffc08000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer1-ffc09000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer2-ffd00000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer3-ffd01000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-ea3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-phy3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| `-- arch-arm-boot-dts-vt8500-vt8500-bv07.dtb:soc-lcd-controller-d800e400:failed-to-match-any-schema-with-compatible:via-vt8500-fb
|-- arm-randconfig-054-20250617
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9000-(aspeed-ast2600-adc0):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9100-(aspeed-ast2600-adc1):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:bus-1e600000-(aspeed-ast2600-ahbc):compatible:aspeed-ast2600-ahbc-syscon-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:crypto-1e6fa000-(aspeed-ast2600-acry):aspeed-ahbc-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b000-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b100-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-2c-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):lpc-snoop:clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):reg-io-width:is-not-of-type-object
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740100:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740200:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:syscon-1e6e2000-(aspeed-ast2600-scu):smp-memram-does-not-match-any-of-the-regexes:interrupt-controller-9a-f-p2a-control-9a-f-pinctrl(-9a-f-)
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:timer-(arm-armv7-timer):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:amba-(simple-bus):nodename:amba-does-not-match-(-a-z-a-z0-bus-bus-localbus-soc-axi-ahb-apb)(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:base_fpga_region-(fpga-region):nodename:base_fpga_region-does-not-match-fpga-region(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_periph_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_sdram_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff400000-(altr-socfpga-lwhps2fpga-bridge):nodename:fpga_bridge-ff400000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff500000-(altr-socfpga-hps2fpga-bridge):nodename:fpga_bridge-ff500000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:osc2-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pdma-ffe01000-(arm-pl330):nodename:pdma-ffe01000-does-not-match-dma-controller(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pmu-ff111000-(arm-cortex-a9-pmu):reg-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):base_fpga_region:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):sdramedac:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):stmmac-axi-config:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):usbphy:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:spi-ff705000-(intel-socfpga-qspi):resets:is-too-short
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):address-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):size-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sysmgr-ffd08000-(altr-sys-mgr):compatible:oneOf-conditional-failed-one-must-be-fixed:
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer0-ffc08000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer1-ffc09000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer2-ffd00000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer3-ffd01000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-ea3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-phy3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| `-- arch-arm-boot-dts-vt8500-vt8500-bv07.dtb:soc-lcd-controller-d800e400:failed-to-match-any-schema-with-compatible:via-vt8500-fb
|-- arm-randconfig-055-20250617
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9000-(aspeed-ast2600-adc0):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:adc-1e6e9100-(aspeed-ast2600-adc1):interrupts-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:bus-1e600000-(aspeed-ast2600-ahbc):compatible:aspeed-ast2600-ahbc-syscon-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:crypto-1e6fa000-(aspeed-ast2600-acry):aspeed-ahbc-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b000-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:fsi-1e79b100-(aspeed-ast2600-fsi-master):compatible:aspeed-ast2600-fsi-master-fsi-master-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:kcs-2c-(aspeed-ast2500-kcs-bmc-v2):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):lpc-snoop:clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:lpc-1e789000-(aspeed-ast2600-lpc-v2):reg-io-width:is-not-of-type-object
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740100:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:sdc-1e740000-(aspeed-ast2600-sd-controller):sdhci-1e740200:compatible:aspeed-ast2600-sdhci-sdhci-is-too-long
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:syscon-1e6e2000-(aspeed-ast2600-scu):smp-memram-does-not-match-any-of-the-regexes:interrupt-controller-9a-f-p2a-control-9a-f-pinctrl(-9a-f-)
| |-- arch-arm-boot-dts-aspeed-aspeed-bmc-nvidia-gb200nvl-bmc.dtb:timer-(arm-armv7-timer):clocks-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:amba-(simple-bus):nodename:amba-does-not-match-(-a-z-a-z0-bus-bus-localbus-soc-axi-ahb-apb)(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:base_fpga_region-(fpga-region):nodename:base_fpga_region-does-not-match-fpga-region(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_periph_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:f2s_sdram_ref_clk-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff400000-(altr-socfpga-lwhps2fpga-bridge):nodename:fpga_bridge-ff400000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:fpga_bridge-ff500000-(altr-socfpga-hps2fpga-bridge):nodename:fpga_bridge-ff500000-does-not-match-fpga-bridge(-.-(-))
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:osc2-(fixed-clock):clock-frequency-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pdma-ffe01000-(arm-pl330):nodename:pdma-ffe01000-does-not-match-dma-controller(-.-)
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:pmu-ff111000-(arm-cortex-a9-pmu):reg-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):base_fpga_region:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):sdramedac:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):stmmac-axi-config:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:soc-(simple-bus):usbphy:ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:spi-ff705000-(intel-socfpga-qspi):resets:is-too-short
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):address-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):ranges-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sram-ffff0000-(mmio-sram):size-cells-is-a-required-property
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:sysmgr-ffd08000-(altr-sys-mgr):compatible:oneOf-conditional-failed-one-must-be-fixed:
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer0-ffc08000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer1-ffc09000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer2-ffd00000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-intel-socfpga-socfpga_cyclone5_de10nano.dtb:timer3-ffd01000-(snps-dw-apb-timer):reset-names-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-ea3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| |-- arch-arm-boot-dts-nxp-lpc-lpc3250-phy3250.dtb:memory-controller-(arm-pl175):address-cells:was-expected
| `-- arch-arm-boot-dts-vt8500-vt8500-bv07.dtb:soc-lcd-controller-d800e400:failed-to-match-any-schema-with-compatible:via-vt8500-fb
|-- arm-randconfig-r133-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| `-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
|-- arm64-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- arm64-randconfig-051-20250617
| |-- arch-arm64-boot-dts-broadcom-bcm2712-d-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:axi-(simple-bus):gpu:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:firmware-(raspberrypi-bcm2835-firmware):address-cells-size-cells-dma-ranges-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clock-names-interrupt-names-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clocks:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):interrupts:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):firmware:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):power:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-intel-socfpga_agilex5_socdk_nand.dtb:nand-controller-10b80000-(cdns-hp-nfc):clock-names-is-a-required-property
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-hayato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-spherion-r0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-dojo-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-demo.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-kontron-sbc-i1200.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-radxa-nio-12l.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pmic-(qcom-pm8350c):pwm:nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pwm-(qcom-pm8350c-pwm):nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sdm845-shift-axolotl.dtb:panel-(visionox-rm69299-shift):address-cells-size-cells-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| `-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
|-- arm64-randconfig-052-20250617
| |-- arch-arm64-boot-dts-broadcom-bcm2712-d-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:axi-(simple-bus):gpu:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:firmware-(raspberrypi-bcm2835-firmware):address-cells-size-cells-dma-ranges-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clock-names-interrupt-names-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clocks:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):interrupts:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):firmware:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):power:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-intel-socfpga_agilex5_socdk_nand.dtb:nand-controller-10b80000-(cdns-hp-nfc):clock-names-is-a-required-property
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-hayato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-spherion-r0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-dojo-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-demo.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-kontron-sbc-i1200.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-radxa-nio-12l.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pmic-(qcom-pm8350c):pwm:nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pwm-(qcom-pm8350c-pwm):nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sdm845-shift-axolotl.dtb:panel-(visionox-rm69299-shift):address-cells-size-cells-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| `-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
|-- arm64-randconfig-053-20250617
| |-- arch-arm64-boot-dts-broadcom-bcm2712-d-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:axi-(simple-bus):gpu:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:firmware-(raspberrypi-bcm2835-firmware):address-cells-size-cells-dma-ranges-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clock-names-interrupt-names-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clocks:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):interrupts:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):firmware:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):power:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-intel-socfpga_agilex5_socdk_nand.dtb:nand-controller-10b80000-(cdns-hp-nfc):clock-names-is-a-required-property
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-hayato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-spherion-r0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-dojo-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-demo.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-kontron-sbc-i1200.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-radxa-nio-12l.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pmic-(qcom-pm8350c):pwm:nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pwm-(qcom-pm8350c-pwm):nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sdm845-shift-axolotl.dtb:panel-(visionox-rm69299-shift):address-cells-size-cells-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| `-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
|-- arm64-randconfig-054-20250617
| |-- arch-arm64-boot-dts-broadcom-bcm2712-d-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:axi-(simple-bus):gpu:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:firmware-(raspberrypi-bcm2835-firmware):address-cells-size-cells-dma-ranges-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clock-names-interrupt-names-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clocks:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):interrupts:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):firmware:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):power:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-intel-socfpga_agilex5_socdk_nand.dtb:nand-controller-10b80000-(cdns-hp-nfc):clock-names-is-a-required-property
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-hayato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-spherion-r0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-dojo-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-demo.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-kontron-sbc-i1200.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-radxa-nio-12l.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pmic-(qcom-pm8350c):pwm:nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pwm-(qcom-pm8350c-pwm):nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sdm845-shift-axolotl.dtb:panel-(visionox-rm69299-shift):address-cells-size-cells-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| `-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
|-- arm64-randconfig-055-20250617
| |-- arch-arm64-boot-dts-broadcom-bcm2712-d-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:axi-(simple-bus):gpu:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:firmware-(raspberrypi-bcm2835-firmware):address-cells-size-cells-dma-ranges-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c701400-(brcm-bcm2712-hdmi0):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:cec-tx-cec-rx-cec-low-hpd-connected-hpd-removed-is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:hpd-connected-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupt-names:wakeup-was-expected
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hdmi-7c706400-(brcm-bcm2712-hdmi1):interrupts:is-too-short
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clock-names-interrupt-names-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):clocks:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:hvs-107c580000-(brcm-bcm2712-hvs):interrupts:is-too-long
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):firmware:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b-ovl-rp1.dtb:soc-107c000000-(simple-bus):power:ranges-is-a-required-property
| |-- arch-arm64-boot-dts-broadcom-bcm2712-rpi-b.dtb:pcie-(brcm-bcm2712-pcie):Unevaluated-properties-are-not-allowed-(-rp1_nexus-was-unexpected)
| |-- arch-arm64-boot-dts-intel-socfpga_agilex5_socdk_nand.dtb:nand-controller-10b80000-(cdns-hp-nfc):clock-names-is-a-required-property
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku4.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku5.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku6.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8188-geralt-ciri-sku7.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-hayato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-asurada-spherion-r0.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8192-evb.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-dojo-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r1.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r2.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-cherry-tomato-r3.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8195-demo.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8370-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe1):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe2):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys-wpe3):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-nr):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-imgsys1-dip-top):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-(mediatek-mt8188-ipesys):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1604f000-(mediatek-mt8188-camsys-rawa):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1606f000-(mediatek-mt8188-camsys-yuva):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-1608f000-(mediatek-mt8188-camsys-rawb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:clock-controller-160af000-(mediatek-mt8188-camsys-yuvb):reset-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8390-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-genio-evk.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-kontron-sbc-i1200.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-mediatek-mt8395-radxa-nio-12l.dtb:pmic-(mediatek-mt6359):sound-dai-cells-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pmic-(qcom-pm8350c):pwm:nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs6490-rb3gen2-industrial-mezzanine.dtb:pwm-(qcom-pm8350c-pwm):nvmem:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-qcs8550-aim300-aiot.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sdm845-shift-axolotl.dtb:panel-(visionox-rm69299-shift):address-cells-size-cells-do-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-hdk.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-qrd.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx223.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-aaf0000-(qcom-sm8450-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8450-sony-xperia-nagara-pdx224.dtb:clock-controller-ade0000-(qcom-sm8450-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-hdk.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-mtp.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-qrd.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-samsung-q5q.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-aaf0000-(qcom-sm8550-videocc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-required-opps-were-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8550-sony-xperia-yodo-pdx234.dtb:clock-controller-ade0000-(qcom-sm8550-camcc):required-opps:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk-display-card.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-hdk.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-mtp.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-aaf0000-(qcom-sm8650-videocc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):Unevaluated-properties-are-not-allowed-(-power-domains-was-unexpected)
| |-- arch-arm64-boot-dts-qcom-sm8650-qrd.dtb:clock-controller-ade0000-(qcom-sm8650-camcc):power-domains:is-too-short
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
| |-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:spdif-dit-(linux-spdif-dit):port-does-not-match-any-of-the-regexes:pinctrl
| `-- arch-arm64-boot-dts-rockchip-rk3399-rockpro64-v2-screen.dtb:typec-portc-(fcs-fusb302):connector-is-a-required-property
|-- csky-randconfig-r111-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_1080p_display_desc-was-not-declared.-Should-it-be-static
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_shift_desc-was-not-declared.-Should-it-be-static
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- csky-randconfig-r123-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| `-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
|-- hexagon-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- hexagon-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- hexagon-randconfig-r121-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_1080p_display_desc-was-not-declared.-Should-it-be-static
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_shift_desc-was-not-declared.-Should-it-be-static
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- i386-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- i386-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- i386-randconfig-061-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- drivers-gpu-drm-i915-display-intel_panel.c:sparse:sparse:symbol-dummy_panel_funcs-was-not-declared.-Should-it-be-static
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_1080p_display_desc-was-not-declared.-Should-it-be-static
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_shift_desc-was-not-declared.-Should-it-be-static
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- i386-randconfig-062-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- drivers-gpu-drm-i915-display-intel_panel.c:sparse:sparse:symbol-dummy_panel_funcs-was-not-declared.-Should-it-be-static
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- i386-randconfig-063-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- loongarch-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- loongarch-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- loongarch-loongson3_defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- m68k-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- m68k-allnoconfig
| `-- kismet:WARNING:unmet-direct-dependencies-detected-for-STACKTRACE-when-selected-by-STACKDEPOT
|-- m68k-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- microblaze-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- microblaze-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- mips-allnoconfig
| `-- kismet:WARNING:unmet-direct-dependencies-detected-for-SERIAL_8250-when-selected-by-ECONET
|-- mips-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- nios2-randconfig-002-20250617
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- nios2-randconfig-r122-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_1080p_display_desc-was-not-declared.-Should-it-be-static
| `-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_shift_desc-was-not-declared.-Should-it-be-static
|-- openrisc-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- parisc-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- parisc-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- parisc-defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- parisc-generic-32bit_defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- powerpc-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- powerpc-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- powerpc-ge_imp3a_defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- powerpc-pasemi_defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- powerpc-randconfig-r131-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| `-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
|-- riscv-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- riscv-allyesconfig
| |-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
| `-- clang:error:clang-frontend-command-failed-with-exit-code-(use-v-to-see-invocation)
|-- s390-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- s390-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- s390-defconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- sh-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- sh-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- sparc-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- sparc-randconfig-r113-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| `-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
|-- um-allmodconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- um-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- um-randconfig-r062-20250617
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- x86_64-allyesconfig
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
|-- x86_64-randconfig-121-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- drivers-gpu-drm-i915-display-intel_panel.c:sparse:sparse:symbol-dummy_panel_funcs-was-not-declared.-Should-it-be-static
| |-- drivers-gpu-drm-nouveau-nvif-chan.c:sparse:sparse:incorrect-type-in-initializer-(different-address-spaces)-expected-unsigned-int-const-usertype-map-got-void-noderef-__iomem-ptr
| |-- drivers-gpu-drm-nouveau-nvif-chan906f.c:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-noderef-__iomem-ptr-got-void-sema
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_1080p_display_desc-was-not-declared.-Should-it-be-static
| |-- drivers-gpu-drm-panel-panel-visionox-rm69299.c:sparse:sparse:symbol-visionox_rm69299_shift_desc-was-not-declared.-Should-it-be-static
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- x86_64-randconfig-122-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- x86_64-randconfig-123-20250617
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char
| |-- drivers-dma-buf-dma-fence.c:sparse:sparse:incorrect-type-in-return-expression-(different-address-spaces)-expected-char-const-noderef-__rcu-got-char-const
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-argument-(different-address-spaces)-expected-char-const-str-got-char-const-noderef-__rcu
| |-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-driver_ptr_-got-char-const-noderef-__rcu
| `-- include-trace-events-dma_fence.h:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-const-timeline_ptr_-got-char-const-noderef-__rcu
|-- x86_64-randconfig-161-20250617
| `-- fs-dcache.c-d_splice_alias_ops()-warn:inconsistent-returns-inode-i_lock-.
|-- x86_64-rhel-9.4-rust
| `-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
`-- xtensa-allyesconfig
`-- Warning:fs-nfsd-filecache.c-function-parameter-pnf-not-described-in-nfsd_file_put_local
elapsed time: 732m
configs tested: 133
configs skipped: 2
tested configs:
alpha allnoconfig gcc-15.1.0
alpha allyesconfig gcc-15.1.0
alpha defconfig gcc-15.1.0
arc allmodconfig gcc-15.1.0
arc allnoconfig gcc-15.1.0
arc allyesconfig gcc-15.1.0
arc defconfig gcc-15.1.0
arc nsim_700_defconfig gcc-15.1.0
arc randconfig-001-20250617 gcc-11.5.0
arc randconfig-002-20250617 gcc-15.1.0
arm allmodconfig gcc-15.1.0
arm allnoconfig clang-21
arm allyesconfig gcc-15.1.0
arm ixp4xx_defconfig gcc-15.1.0
arm randconfig-001-20250617 gcc-8.5.0
arm randconfig-002-20250617 clang-21
arm randconfig-003-20250617 clang-21
arm randconfig-004-20250617 clang-21
arm spear3xx_defconfig clang-17
arm64 allmodconfig clang-19
arm64 allnoconfig gcc-15.1.0
arm64 randconfig-001-20250617 gcc-11.5.0
arm64 randconfig-002-20250617 clang-21
arm64 randconfig-003-20250617 gcc-8.5.0
arm64 randconfig-004-20250617 gcc-12.3.0
csky allnoconfig gcc-15.1.0
csky randconfig-001-20250617 gcc-13.3.0
csky randconfig-002-20250617 gcc-12.4.0
hexagon allmodconfig clang-17
hexagon allnoconfig clang-21
hexagon allyesconfig clang-21
hexagon randconfig-001-20250617 clang-21
hexagon randconfig-002-20250617 clang-21
i386 allmodconfig gcc-12
i386 allnoconfig gcc-12
i386 allyesconfig gcc-12
i386 buildonly-randconfig-001-20250617 gcc-12
i386 buildonly-randconfig-002-20250617 clang-20
i386 buildonly-randconfig-003-20250617 gcc-12
i386 buildonly-randconfig-004-20250617 gcc-12
i386 buildonly-randconfig-005-20250617 gcc-12
i386 buildonly-randconfig-006-20250617 gcc-12
i386 defconfig clang-20
loongarch allmodconfig gcc-15.1.0
loongarch allnoconfig gcc-15.1.0
loongarch loongson3_defconfig gcc-15.1.0
loongarch randconfig-001-20250617 gcc-15.1.0
loongarch randconfig-002-20250617 gcc-15.1.0
m68k allmodconfig gcc-15.1.0
m68k allnoconfig gcc-15.1.0
m68k allyesconfig gcc-15.1.0
microblaze allmodconfig gcc-15.1.0
microblaze allnoconfig gcc-15.1.0
microblaze allyesconfig gcc-15.1.0
mips allnoconfig gcc-15.1.0
nios2 allnoconfig gcc-14.2.0
nios2 randconfig-001-20250617 gcc-10.5.0
nios2 randconfig-002-20250617 gcc-14.2.0
openrisc allnoconfig gcc-15.1.0
openrisc allyesconfig gcc-15.1.0
openrisc defconfig gcc-15.1.0
parisc allmodconfig gcc-15.1.0
parisc allnoconfig gcc-15.1.0
parisc allyesconfig gcc-15.1.0
parisc defconfig gcc-15.1.0
parisc generic-32bit_defconfig gcc-15.1.0
parisc randconfig-001-20250617 gcc-8.5.0
parisc randconfig-002-20250617 gcc-8.5.0
powerpc allmodconfig gcc-15.1.0
powerpc allnoconfig gcc-15.1.0
powerpc allyesconfig clang-21
powerpc cell_defconfig gcc-15.1.0
powerpc ge_imp3a_defconfig gcc-15.1.0
powerpc holly_defconfig clang-21
powerpc iss476-smp_defconfig gcc-15.1.0
powerpc mgcoge_defconfig clang-21
powerpc mpc866_ads_defconfig clang-21
powerpc pasemi_defconfig clang-21
powerpc randconfig-001-20250617 gcc-8.5.0
powerpc randconfig-002-20250617 clang-16
powerpc randconfig-003-20250617 gcc-12.4.0
powerpc64 randconfig-001-20250617 gcc-14.3.0
powerpc64 randconfig-002-20250617 clang-21
powerpc64 randconfig-003-20250617 gcc-13.3.0
riscv allmodconfig clang-21
riscv allnoconfig gcc-15.1.0
riscv allyesconfig clang-16
riscv defconfig clang-21
riscv randconfig-001-20250617 clang-21
riscv randconfig-002-20250617 gcc-10.5.0
s390 allmodconfig clang-18
s390 allnoconfig clang-21
s390 allyesconfig gcc-15.1.0
s390 defconfig clang-21
s390 randconfig-001-20250617 clang-21
s390 randconfig-002-20250617 clang-20
sh allmodconfig gcc-15.1.0
sh allnoconfig gcc-15.1.0
sh allyesconfig gcc-15.1.0
sh defconfig gcc-15.1.0
sh espt_defconfig gcc-15.1.0
sh magicpanelr2_defconfig gcc-15.1.0
sh randconfig-001-20250617 gcc-12.4.0
sh randconfig-002-20250617 gcc-14.3.0
sh rts7751r2d1_defconfig gcc-15.1.0
sparc allmodconfig gcc-15.1.0
sparc allnoconfig gcc-15.1.0
sparc randconfig-001-20250617 gcc-12.4.0
sparc randconfig-002-20250617 gcc-13.3.0
sparc64 defconfig gcc-15.1.0
sparc64 randconfig-001-20250617 gcc-15.1.0
sparc64 randconfig-002-20250617 gcc-9.3.0
um allmodconfig clang-19
um allnoconfig clang-21
um allyesconfig gcc-12
um defconfig clang-21
um i386_defconfig gcc-12
um randconfig-001-20250617 gcc-12
um randconfig-002-20250617 clang-21
um x86_64_defconfig clang-21
x86_64 allnoconfig clang-20
x86_64 allyesconfig clang-20
x86_64 buildonly-randconfig-001-20250617 clang-20
x86_64 buildonly-randconfig-002-20250617 clang-20
x86_64 buildonly-randconfig-003-20250617 gcc-11
x86_64 buildonly-randconfig-004-20250617 gcc-12
x86_64 buildonly-randconfig-005-20250617 gcc-12
x86_64 buildonly-randconfig-006-20250617 gcc-12
x86_64 defconfig gcc-11
x86_64 rhel-9.4-rust clang-18
xtensa allnoconfig gcc-15.1.0
xtensa randconfig-001-20250617 gcc-10.5.0
xtensa randconfig-002-20250617 gcc-12.4.0
--
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https://github.com/intel/lkp-tests/wiki
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