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bh=TmCvO12iAjHSRBJDFbEkaVzXDT8a8vX3wzPeUnlsa9s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sIw08p51XIj5EbAwuNGYLYUlpNL2nf3nisSDjSd6CTG5MqAQE3CPjzFwXRo9Tctza dmq1pAKdWQqtprsnDuwV8WLy9TcNI3EPXi6eprgKVZtL1goOwG6DhSoroM/thdRCZg gm/DV38U6ihb2/WizMSYIpahGPpI3K55FfOqXhaQ= From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , Usama Arif , linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [RFC V2 13/14] arm64/mm: Add an abstraction level for tlbi_op Date: Wed, 13 May 2026 10:15:46 +0530 Message-ID: <20260513044547.4128549-14-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260513044547.4128549-1-anshuman.khandual@arm.com> References: <20260513044547.4128549-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 98D0F180009 X-Rspam-User: X-Stat-Signature: 4gahf31anjx1sethk1g8eizydmsgfquk X-HE-Tag: 1778647662-511050 X-HE-Meta: U2FsdGVkX192GDJLo3JSxKnE7BN0DuUfnPNSrJE08yy/AIdEWIzOwP+Ml10bWAAejZQiotGACJ+M04vV8G38MymLU1+cGtpxGiJlz0oJ2cViYMBxtnaC3zqSkVqbhJMmrPNI7PieQHvwhz2Z2dctNmYqu4/8mOYjxx6sPsZACm50hgUS3nSZoMP1tQbHPbKzM/UFIE5xqQyqjzvkbO2l1y3nmg1gfFXM6MQ2TidPxoAVbYtSIvKVU0ORYPsX4w4c6ETBRjEgBPol+G6hNluLn46hi4osaJKLMcus+hRyxhE1jxENx8j3kVhLVo+qfGn43vz+t5KUMR7a8Dq+n3QffAGGQER4z1pWlfDCnwoeWKfTyMftL9Zm8JaqdaZgQ7FUFXQXyOKBhQAvMzwc4DjPvtQkowFr0N1x0/jdFNPBAo/JTvZQ3TVtavFrUMDxSjmf4wkW6z87MVRdGpcMe08QFTvEHxburNaD+rAnmNaxzTFlZdU3/DgPoejeKue4oqtgGiw1RjbCyT8G/oPiVAYeh2IDPLdPjJChimKmcrkcHsrNqU4InSS9+jyShqeRCzViAyPI5wMU9uMGrti0gzbtmIIRDctFretDDLhGoP5J0m4R6iJIXpcy3F8+xB+ivhcKWMLb2cu5hB4CV8/enLpb7CiiA6WILKvWzGcNNvuX2FgafXNuABxWI+YcligIFHCrkrPaQARwvzGieuK+91cS05WE8Qzz4YJ0qdPxMrbjuvqO1iMD4f0BrWSPddV9WmG5yO4SxiPdPXFaFri9zQ26pAXFCJ9zrCDLFz/0J14uV/4YYmnWrmtHYpBFRIyY3Nt9VqxmZQLLF92+v1BKSHkLL4cY9ZHMBhm9tV60HrB6iPPLB9el7JteDCn/et8ESSHb/ydLF1IfpmGugS/WHq3eDclXdjrEKEorPrbh7UhwzBMEwuEJK9mCWUC+F+iYLQiWWcnBAXwo/KHp/zRa231 75oYGPfb j/7jnrjas8hWYdS4R5ymFMjdkXzJa6qYBQYvcbvSNPo8BxQSCz63rjIxc4uNtvO1ys9QfGEaWCpTi0ellStuM7GJQKqRs1IoV01Hj4U7pn25j7IhEcOCGAtN4FhNxOzU8sDa1BNLKs29F0bb8TJCgXxxiacMB9Apvioj1uuufAY0qCHV4vwpBvmMtSTKOWGluAVaogd/Cmf4mPNyNGvBQjbgYgHOFvNGxpSmNe7xEAgeFgHrXb3ipNztBjkK+X55oj5GtGDZKS7d1dq6gwZ7nNCHvQhn23ydYJ5Hj Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Linu Cherian With FEAT_D128, a new instruction aka TLBIP is being introduced for the TLB range operations which has an argument size of 128 bit. Add an abstraction level to void (*tlbi_op)(u64 arg) helpers to support the D128 variations when applicable. No functional changes are introduced with this patch. Signed-off-by: Linu Cherian Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/tlbflush.h | 70 ++++++++++++++++--------------- 1 file changed, 37 insertions(+), 33 deletions(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index c0bf5b398041..361d74ef8016 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -162,49 +162,53 @@ static inline void sme_dvmsync_batch(struct arch_tlbflush_unmap_batch *batch) #define TLBI_TTL_UNKNOWN INT_MAX -typedef void (*tlbi_op)(u64 arg); +typedef u64 tlbi_args_t; +#define __tlbi_wrapper(op, arg) __tlbi(op, arg) +#define __tlbi_user_wrapper(op, arg) __tlbi_user(op, arg) -static __always_inline void vae1is(u64 arg) +typedef void (*tlbi_op)(tlbi_args_t arg); + +static __always_inline void vae1is(tlbi_args_t arg) { - __tlbi(vae1is, arg); - __tlbi_user(vae1is, arg); + __tlbi_wrapper(vae1is, arg); + __tlbi_user_wrapper(vae1is, arg); } -static __always_inline void vae2is(u64 arg) +static __always_inline void vae2is(tlbi_args_t arg) { - __tlbi(vae2is, arg); + __tlbi_wrapper(vae2is, arg); } -static __always_inline void vale1(u64 arg) +static __always_inline void vale1(tlbi_args_t arg) { - __tlbi(vale1, arg); - __tlbi_user(vale1, arg); + __tlbi_wrapper(vale1, arg); + __tlbi_user_wrapper(vale1, arg); } -static __always_inline void vale1is(u64 arg) +static __always_inline void vale1is(tlbi_args_t arg) { - __tlbi(vale1is, arg); - __tlbi_user(vale1is, arg); + __tlbi_wrapper(vale1is, arg); + __tlbi_user_wrapper(vale1is, arg); } -static __always_inline void vale2is(u64 arg) +static __always_inline void vale2is(tlbi_args_t arg) { - __tlbi(vale2is, arg); + __tlbi_wrapper(vale2is, arg); } -static __always_inline void vaale1is(u64 arg) +static __always_inline void vaale1is(tlbi_args_t arg) { - __tlbi(vaale1is, arg); + __tlbi_wrapper(vaale1is, arg); } -static __always_inline void ipas2e1(u64 arg) +static __always_inline void ipas2e1(tlbi_args_t arg) { - __tlbi(ipas2e1, arg); + __tlbi_wrapper(ipas2e1, arg); } -static __always_inline void ipas2e1is(u64 arg) +static __always_inline void ipas2e1is(tlbi_args_t arg) { - __tlbi(ipas2e1is, arg); + __tlbi_wrapper(ipas2e1is, arg); } static __always_inline void __tlbi_level_asid(tlbi_op op, u64 addr, u32 level, @@ -475,32 +479,32 @@ static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) * operations can only span an even number of pages. We save this for last to * ensure 64KB start alignment is maintained for the LPA2 case. */ -static __always_inline void rvae1is(u64 arg) +static __always_inline void rvae1is(tlbi_args_t arg) { - __tlbi(rvae1is, arg); - __tlbi_user(rvae1is, arg); + __tlbi_wrapper(rvae1is, arg); + __tlbi_user_wrapper(rvae1is, arg); } -static __always_inline void rvale1(u64 arg) +static __always_inline void rvale1(tlbi_args_t arg) { - __tlbi(rvale1, arg); - __tlbi_user(rvale1, arg); + __tlbi_wrapper(rvale1, arg); + __tlbi_user_wrapper(rvale1, arg); } -static __always_inline void rvale1is(u64 arg) +static __always_inline void rvale1is(tlbi_args_t arg) { - __tlbi(rvale1is, arg); - __tlbi_user(rvale1is, arg); + __tlbi_wrapper(rvale1is, arg); + __tlbi_user_wrapper(rvale1is, arg); } -static __always_inline void rvaale1is(u64 arg) +static __always_inline void rvaale1is(tlbi_args_t arg) { - __tlbi(rvaale1is, arg); + __tlbi_wrapper(rvaale1is, arg); } -static __always_inline void ripas2e1is(u64 arg) +static __always_inline void ripas2e1is(tlbi_args_t arg) { - __tlbi(ripas2e1is, arg); + __tlbi_wrapper(ripas2e1is, arg); } static __always_inline void __tlbi_range(tlbi_op op, u64 addr, -- 2.43.0