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Mercier" , =?utf-8?q?Christian_K=C3=B6nig?= , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Catalin Marinas , Will Deacon Cc: Thierry Reding , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-s390@vger.kernel.org, linux-mm@kvack.org, iommu@lists.linux.dev, linaro-mm-sig@lists.linaro.org, linux-trace-kernel@vger.kernel.org, Thierry Reding X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3519; i=treding@nvidia.com; h=from:subject:message-id; bh=DfAPq+WrFjXuxENDtD3cOfZznmCd6BODekDyNN2sHyM=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqRTuF+wqCHtBjl7P+pNku92FShBXmKUOKJc/BE Rq91UpauHyJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCakU7hQAKCRDdI6zXfz6z oVsRD/9Lu0d/mH9amkHL1bT4wtGLxaWbO0BXEuEJlCKoQj6WgB53dHFEmpkZnFGdAFGWalJcHAl lDGfP7r3CexIdmXNF33PjJCYZxsNw2mWMX5KwZWGfRSw/fxUQ2mQqo9sxkwvI7/f7GuCQa3yE4E lUJgDfRJeqXLCPKHjD05sc2lvcx3P10FKeQoRUZCHwODIA2FVjwiGSdObMQ09OkKMPAFY+wGtrN WpH4UWUdwUM3ppw89khez3D9sdmQT7cptx+6D70C42Okc3XMhY42eNHkhfMjJ1ppjag9sWuQ/k1 ZiQBIsrL6rYJ7oobxibfPNWfhDqFUc0gg+ljdFkL8vY/ktkkXRddpHPTIR+fKfGDaZH5PTF5FtS VXeQYa0Gdb3EBNpC9jQrnaE8vFSb3o7Emh2VxQgvIHDtxnsOp2Rz41kAd32/nwwU6msVOJcMxZb Abs5M2i0Ucs993gi8+Q6f0XLRgrzgDkVafgKOpt+oEG0vqApZn9lJ+GRLMcS83xtW4C3Hekwndq ceQi9dUsW+79FdTdKnoJ+8dlAv2JiHPc9CKABXKvN7stLbJXWZ865CPMkJlURRaRvzCN0HSiUAY 4sZSHfnY5XjOq/f9OohstHiENl1z0Z/7xIvq3bObJWGdKJquNyyEoMsLSgdlsd+Kji8+fERs9c/ BJ1kujm/cPoxkbA== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 X-Rspam-User: X-Stat-Signature: ymp8c57m8ns9npqpdsbba3c9aeac38s6 X-Rspamd-Queue-Id: 41F8E14000F X-Rspamd-Server: rspam06 X-HE-Tag: 1782922125-622125 X-HE-Meta: U2FsdGVkX1/U5sFjE/a2WzE804cBgsRANciN5zBgjjV2fh7JB+N4QIroQCf33KebP1VVzT9ho3xds8ZidlWjNxN172b09ydwbxQy3g6aBZKbg/xyA6MnTxabaDofNTbKwk2Sxko+dRmxub3Ma4Pgb1h5WuwS/WrkuCLnUj6swvkoSK+0+i35Rsyv1fXX2aX0IBKP6I5bXFkZ92aapaFR2SsJGG3P5V+G5LSpDo2S2UBkkkUM+OMmoZFr3LmpfM6RzWDHqqpbsWV2OLmzDO+/2vul3NFI0rroEdp3Cmf6ZLB9gsTc391yGvV4vWxw4Uh3m8uuWsRAvvsk1lrABGNtl9p5na14yDqRqd3zFHJ7AEszi2OXJIQGJ+aeCuyDE1a3Wjtu1Ri6qT3FE9c0a2qpLggsKV45l4FeJ1JiV/Jxp02GxydKDbR4fP8t7P6WWMJv9DI7JvNVq5e3bYY9GMpL/2g9H17UYNi8Hkddv7kPq2GRkZ0ZERKh2tf5LL1DuQI127auuhCNqX3fVB1zSp56fyz5h4PuDo/2hFd4QHoPAsibIwMCrchRg6k+T3mRBvW3/1I3KcZIok3W5iC4MmCNFDxlobr4saPGVYxuZUa++DMVJsCg2WKLgWNBD3/6mjU01Ss3JYW1r2M6UETshkFpDWZEBvTDwVcKpdJAT9m8cDOEUJpd1bmPvBHlmGBKR9VIRrFmakVA/3hyNCgiJych2NP1MK/y4ZR4nRiN/S511AiVv+tznarVWQoFNQf5gn7QLtgP7Ue2usPnm7tXaRap+ps6Hwv/bo+iB6dlRohpgQm95kR2Hh18xRYOhg+Um8R5YrCCc2ZP4HjbKmBTUifwVVv8OEe8D861qbXSYFTu7Nh2912DZUoHibhUZ15WyqSPEk5w0rc46dxlnol3Nn/U97Pd1Bry+pqPo8n006QH4EIrawtkea3mBUlPrjom/udsbDqDSn3oSqHr9AT4wNl m9wYeECK CzfDbjWSV/3B1pNgwTTtGaciXAb9flK1QDgCOCygocZdYxZhaRzj3hB2C5UHHEYNtNw+P1G1eYWPGRz5DashyAtx/H9Wn4Qexcz/t6k6fMC3RngK9pVywSPI7ZrWVG+rRHht4L2U4HF+JsGwL8gJaMsEEvaFgUneuaaYX2X9HY+72pXez8Ckv2VLGnozJ6fLD7SE/K2pqLufxW6rZ5rxK6V+N1lCxH25iAmNPotLPH+zL7An6M5y4FKUvUQ1mM/XAY1wUn8693sufNEtnMMBDf++CzxPRuuctqIdn5zC0y7+Wp9QiHHH2Cz7uKOh02iJWObBc5TICKSfJhM2W6mi1Q/q62LoxWtgvH2P3to0Q+1+wcXaH5NpdgIbeMXbgyZQnURZizsGXhyMujuHJSZi/CDnmLoHVM1yPrjKD Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Thierry Reding The Video Protection Region (VPR) found on NVIDIA Tegra chips is a region of memory that is protected from CPU accesses. It is used to decode and play back DRM protected content. It is a standard reserved memory region that can exist in two forms: static VPR where the base address and size are fixed (uses the "reg" property to describe the memory) and a resizable VPR where only the size is known upfront and the OS can allocate it wherever it can be accomodated. Reviewed-by: Rob Herring (Arm) Signed-off-by: Thierry Reding --- Changes in v2: - add examples for fixed and resizable VPR --- .../nvidia,tegra-video-protection-region.yaml | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml new file mode 100644 index 000000000000..1c524bae9ce3 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra-video-protection-region.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Video Protection Region (VPR) + +maintainers: + - Thierry Reding + - Jon Hunter + +description: | + NVIDIA Tegra chips have long supported a mechanism to protect a single, + contiguous memory region from non-secure memory accesses. Typically this + region is used for decoding and playback of DRM protected content. Various + devices, such as the display controller and multimedia engines (video + decoder) can access this region in a secure way. Access from the CPU is + generally forbidden. + + Two variants exist for VPR: one is fixed in both the base address and size, + while the other is resizable. Fixed VPR can be described by just a "reg" + property specifying the base address and size, whereas the resizable VPR + is defined by a size/alignment pair of properties. For resizable VPR the + memory is reusable by the rest of the system when it's unused for VPR and + therefore the "reusable" property must be specified along with it. For a + fixed VPR, the memory is permanently protected, and therefore it's not + reusable and must also be marked as "no-map" to prevent any (including + speculative) accesses to it. + +allOf: + - $ref: reserved-memory.yaml + +properties: + compatible: + const: nvidia,tegra-video-protection-region + +dependencies: + size: [alignment, reusable] + alignment: [size, reusable] + reusable: [alignment, size] + + reg: [no-map] + no-map: [reg] + +unevaluatedProperties: false + +oneOf: + - required: + - compatible + - reg + + - required: + - compatible + - size + +examples: + - | + /* resizable VPR */ + protected { + compatible = "nvidia,tegra-video-protection-region"; + + size = <0x0 0x70000000>; + alignment = <0x0 0x100000>; + reusable; + }; + + - | + /* fixed VPR */ + protected@2a8000000 { + compatible = "nvidia,tegra-video-protection-region"; + + /* fixed VPR */ + reg = <0x2 0xa8000000 0x0 0x70000000>; + no-map; + }; -- 2.54.0