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Mercier" , =?utf-8?q?Christian_K=C3=B6nig?= , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Catalin Marinas , Will Deacon , Chun Ng Cc: Thierry Reding , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-s390@vger.kernel.org, linux-mm@kvack.org, iommu@lists.linux.dev, linaro-mm-sig@lists.linaro.org, linux-trace-kernel@vger.kernel.org, Thierry Reding X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3632; i=treding@nvidia.com; h=from:subject:message-id; bh=jo2vnekdZsouYUQf+QH67E3qqmxhXj9IA93KgM9Y+BM=; b=owEBbQKS/ZANAwAKAd0jrNd/PrOhAcsmYgBqdf/FNHgyQa15FevY1/thrxD0sB9vo4bnOIRT8 tp/CjNUXkKJAjMEAAEKAB0WIQSI6sMIAUnM98CNyJ/dI6zXfz6zoQUCanX/xQAKCRDdI6zXfz6z oaq/D/0eCojgoB3KJavlR6xgbEUetRljxwEn+8PW//EIz+hJVhhvezJ6kJu/yS2njhI6JLTnskl +ukeJ4O1Imw3Wd4xMY+3+44ReNFBaiapc2Q+Aeq4QkJSS5qaoEikCq/so8K5hUmK61JbIFJZkNT OckYBwMIuKziiVatVEIIeKTcuxNwA11rt1ErtYxgeafbmnUKc61x1uI0csmPxCpNYcXA9+p9Gvj ck3a0bKdwaaPtVN+vCfpg+iMvOG9LazfYuwcIIQyrWsnsRCHV2NJxyLfgdam1S4TLWTjmLf/ZJ4 ctTNHn5y63okLyCPhlNWoRXhifKPzmVg/G+lHXnTuZIEMaiW2H6NyABda1PgrTjegT8U9gQXMgn Z2L6p/VBKIzakTuvzMEqpSbwHcLHz6qUcXzcZ+o+UjGooECbmUUPtKl7QoYTlxJki559rAwCSIW ykU/R7yhnasDijco7sB2WWNZ/EbtSfZpcQkUMnPBGSrZqOElwqA+wI6BgEuQ65/Mm1y8v3i5gZS MHVB1mafczj3DYdFViJkl9sizdKHGs/pqdEAue9zPcDlE4pXBL4LRWwGLRRGR/kDfFDUmN7F+ss v50LxtjiThULT5XhW3Fs67stkNOr/rar4iiLFpjCsZkS28nMKvgAjZ+DeLHuC2IC7vaWwNTiiEX 1c3+W/HsKGw5IMg== X-Developer-Key: i=treding@nvidia.com; a=openpgp; fpr=88EAC3080149CCF7C08DC89FDD23ACD77F3EB3A1 X-Rspamd-Queue-Id: 116B32000E X-Stat-Signature: weyfs71ohu9ist6uxkezk1qmtx8qwcqz X-Rspam-User: X-Rspamd-Server: rspam04 X-HE-Tag: 1786118093-57724 X-HE-Meta: U2FsdGVkX19flOJeM71p0vBhQwZ5b0wd6FCeM8BnWxNHOTEepCKKiVlE8B1wn0judyiwaDLLWAmj6MxIX/7hBoTWAmm++rv67NvABLddkK19b9/A3P4kWiKTVzGKlgkpYqoY7whMM+IUAacypIJ+5CZdlsq8a/hI5IdHyoI8OOKnXDu1Gh5OCT3utuT7l+GfhV/qdVAM6+1fx1DQq6/+BN1lbrmypdLqtIXr32Zu0cVwTgmIRXkwZW1m+qsNhuqOHe4sCJ43CPw6/tiGz3L3NheQgcXy7Yv/2VQfjhh6lVSerTPows4kEk6shVNyZZQvKw32lQeaa7wLCcIEIOXmMDz4sYZuEFpx2BzRN09+zr+iQtBZJnlCmiRogiaCX67hyzj5cleCimFo67vs8XfKLj3uRJw9tnbZJKNOkYaw4Y1BUfYUB+bbV89z8AW9zxlXcwtNwqGVIpQT3vRQg8VPWeZyhlHk3OJUQ/hiEL2tKJgkzCAr13UsF/VSfQRGBEhZ1Ki3B9Cknw9JjWZpverBZsqvYiF4LPE37wY55sk0IFxLUahiwBzv1Mjla1J+JrOMwmvLoQdf/PhTvlAy2/I964mCIUX7Oiov7eBV06VbiBzxPMZugSBtl0hQy7lygZosw9pPjeUFN5iaApv9WcNEXwZDi44dpXyD3nhaMDpYwVq6sy54c8qJOtNaowdwFJUJ5TkYc5WMOoqjkJsMo+oxzLonicBf+KPAhxx8CbxClNg5txRmo3AdHbOZqYIgVz+au4qfclEZGSXVYSjPwNfGO5k81WNA2vkUP/xV/hcootb3P/BJNmWGJOEvUfztMaLsH2lHyzYDhX/GYggjP3mEPXtV9mY3hxzaOLvqFOGHm4N8aOJQkfjKJ2aZEVP43XPAMWQcDE6ldfv3i5QFMtFH0PpJ++q1PFX5KZ0R2xd/4G28b7SvyEt9Gfs0yIX9KqIrOC1pgbWbKJJEDR8ifvV VgwCRxcp 3tXHSdOc/7IjZL/zrj9b3auMfuT6nHJqwz8lQLoRN0uJDW8QSyH2ED6gPLDp5oXFIBho9cqEGyye1or9r7sIw0SlT5R2amt6IvRAPEGwhl3Yno34RvH4yg/WSvAnnYjoeTmUAqW86dGgz7k1IhHx2YnJwlMCJ5aCxbh8yJ3Waka/ro0K60MhCOwoUaLe0uD+qT3qBYaz+waw5VmxrtcXWKp6e7aZ91DUCB+VOOe2Vi7srGlTb50gCvmQNvaVTqkvGhbMQKR8Is00MftuqiEKXQsp2Vv4w5bIBm0a+iFT2xVCIMZ+9al+GINTJhmuPlbNGCiAdLWcwoxIyIyKk4Lo1T0MRMtNC1TdhAUpdRotCGqoEUfkXhURbw9fa2o/t1c7iCXv5hov/gq+0XiPL/GRns2QE82OeDuoVbk54 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Thierry Reding The Video Protection Region (VPR) found on NVIDIA Tegra chips is a region of memory that is protected from CPU accesses. It is used to decode and play back DRM protected content. It is a standard reserved memory region that can exist in two forms: static VPR where the base address and size are fixed (uses the "reg" property to describe the memory) and a resizable VPR where only the size is known upfront and the OS can allocate it wherever it can be accomodated. Reviewed-by: Rob Herring (Arm) Signed-off-by: Thierry Reding --- Changes in v4: - move oneOf into allOf for a bit more tidiness - fix example "reg" property Changes in v3: - add examples for fixed and resizable VPR --- .../nvidia,tegra-video-protection-region.yaml | 75 ++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml new file mode 100644 index 000000000000..862bfd391378 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra-video-protection-region.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Video Protection Region (VPR) + +maintainers: + - Thierry Reding + - Jon Hunter + +description: | + NVIDIA Tegra chips have long supported a mechanism to protect a single, + contiguous memory region from non-secure memory accesses. Typically this + region is used for decoding and playback of DRM protected content. Various + devices, such as the display controller and multimedia engines (video + decoder) can access this region in a secure way. Access from the CPU is + generally forbidden. + + Two variants exist for VPR: one is fixed in both the base address and size, + while the other is resizable. Fixed VPR can be described by just a "reg" + property specifying the base address and size, whereas the resizable VPR + is defined by a size/alignment pair of properties. For resizable VPR the + memory is reusable by the rest of the system when it's unused for VPR and + therefore the "reusable" property must be specified along with it. For a + fixed VPR, the memory is permanently protected, and therefore it's not + reusable and must also be marked as "no-map" to prevent any (including + speculative) accesses to it. + +allOf: + - $ref: reserved-memory.yaml + - oneOf: + - required: + - compatible + - reg + + - required: + - compatible + - size + +properties: + compatible: + const: nvidia,tegra-video-protection-region + +dependencies: + size: [alignment, reusable] + alignment: [size, reusable] + reusable: [alignment, size] + + reg: [no-map] + no-map: [reg] + +unevaluatedProperties: false + +examples: + - | + /* resizable VPR */ + protected { + compatible = "nvidia,tegra-video-protection-region"; + + size = <0x0 0x70000000>; + alignment = <0x0 0x100000>; + reusable; + }; + + - | + /* fixed VPR */ + protected@a8000000 { + compatible = "nvidia,tegra-video-protection-region"; + + /* fixed VPR */ + reg = <0xa8000000 0x70000000>; + no-map; + }; -- 2.54.0