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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GoO/h9TLo5WxQU44DjPignv1t1V1GPmlyG79AXj0rqAGEsV1VdWickcqE4TMSYxKb e0iIuExCyFmFHPnmczA8v3nVJeUJ1HA9VAXFwEGmE7WaYEZXk/vp0Prb41nDO6V5jP z3hOjL0pkiO6NZlaJ4aoiMB+agf8MRlGxZ7t6X4k= From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH V2 10/14] arm64/mm: Add an abstraction level for tlbi_op Date: Mon, 7 Sep 2026 09:20:25 +0530 Message-ID: <20260907035030.2839978-11-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260907035030.2839978-1-anshuman.khandual@arm.com> References: <20260907035030.2839978-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Stat-Signature: zdsgctrz7x1qgag135qa3ghq7xs4fcc7 X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 64F72120006 X-Rspam-User: X-HE-Tag: 1788753073-42694 X-HE-Meta: U2FsdGVkX1+NpMck2ANYOJMJfaYfifi/b0ggFI0wyEAw0IWCXsbn9sqtN0ez1rcZxZhnfLigw0fsOAchkAaIZVUzvEQFhxu+hAuhr0BVJ/RxcGwPJPbK/NW1+YJek+O5RWMh//4ouBS1/uDRV4p5hQjaFD94U/UH4NxKljEXOUXugcv5ZrhtPIdk7I6I7qehlGIxfpVtyxf38QoqlZFt1gwK3uRsHfVtVngxECySs1b2NGub6WAd9+6rzFHXLeD/RWUqCDRUtZw3R/zHaIq99jL4z1FoeJq/Lsgts0tZuqKVojE9Ieps+73mp/xra6mVMUY2O1TOnGoOXYh6kzzMqHCU51+pxyvCSelgRE5SAXUgsfboB4eKw2d8M1e0UyItQqJEQxo0EOpsciAC1dQ+ToYAIw0YVSfuorS67uN/7oZcOI2EsZIrzulmeW60THqXrtwAXGAcXfqNp9CfbUIXwLVfPoQ6cQ8384Li2Ful/mbOfiF+53orj8q+cjbcdQb3g291ueXyr1m9SMk20uuo8BvbA6niL4srV427oDlZB4+RoYM1onH2JKaPdgBWxA9JjRRUrlZ0NoNWgKf5oj//uvhgC+CYa0c/oblPSJfgUGkb58PULqkJkY1qubL4INYqAzuthTXHcUFaFZk0yJTR/i2PYuuqjV8vN/GKrG5sCwNDYkgS3MB5iuZYfILlZCEHRw2B61ebKRtvATLLda1Q1C0aFvoK8y+gG8nxdBVO+GVJFHX/4QJacmcVgTyrkMGSaUwkXX9oyRbRpJYMGIh+ayPNOffVUUG1CtVaglUN1leQqsTG5hASPKZ/FD7in7AwnDp8TkC34Vk2UW2Vy3DlMXcgiEvovfGGhwU7yJvdFwY51DzNi1dXANrFTkQS3nJqoe5OtmuwyLu0tzJFjpkkV+2XpCVuEdPWsbIjK6ktwLN5YOhD//wSlXsGu53dXzDhrSBN14AQZuqTHrfwHlJ lLiObW0b h6JxlH9z1i7MZK8rlv/AKta7yYA7iR2BlOL0zqZQVOezs6Lx/5gzQvHFhZWQqscAcwWJKtYYyW29IMYJqBun7KCoo42WX4IwKvPPvbuVuqvGOoYpAMpwLvsoj5lJNdDUcVRYQr6tBBXmY9uEQRzLLPL15orXBQmxy12s6M4Q/6E0wTs3xWC28cyTDztgqyjtUDt62h1gTKwc5eZMI1m2bT9FLnCmX7B8KGD8YHik9eyXGI8FtTf+PNZO+rEHV0W4Jf00oEeRewK/HyK1DkuncS/CqtVuIGbMLQKzjm1mUxcx6241Og9h5EIP7BGvnbo45QQQ1lm5W5bH3xi5+ArzwwJ20IgZyckutOiOUYscy2fcnM7g= Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Linu Cherian With FEAT_D128, a new instruction aka TLBIP is being introduced for the TLB -by-range operations which has an argument size of 128 bit. Add an abstraction level to void (*tlbi_op)(u64 arg) helpers to support the D128 variations when applicable. No functional changes are introduced with this patch. Cc: Catalin Marinas Cc: Will Deacon Cc: Ryan Roberts Cc: Mark Rutland Signed-off-by: Linu Cherian Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/tlbflush.h | 70 ++++++++++++++++--------------- 1 file changed, 37 insertions(+), 33 deletions(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 14a78ac0f800..88ae4e443ed6 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -130,49 +130,53 @@ static inline void sme_dvmsync_batch(void) #define TLBI_TTL_UNKNOWN INT_MAX -typedef void (*tlbi_op)(u64 arg); +typedef u64 tlbi_arg_t; +#define __tlbi_wrapper(op, arg) __tlbi(op, arg) +#define __tlbi_user_wrapper(op, arg) __tlbi_user(op, arg) -static __always_inline void vae1is(u64 arg) +typedef void (*tlbi_op)(tlbi_arg_t arg); + +static __always_inline void vae1is(tlbi_arg_t arg) { - __tlbi(vae1is, arg); - __tlbi_user(vae1is, arg); + __tlbi_wrapper(vae1is, arg); + __tlbi_user_wrapper(vae1is, arg); } -static __always_inline void vae2is(u64 arg) +static __always_inline void vae2is(tlbi_arg_t arg) { - __tlbi(vae2is, arg); + __tlbi_wrapper(vae2is, arg); } -static __always_inline void vale1(u64 arg) +static __always_inline void vale1(tlbi_arg_t arg) { - __tlbi(vale1, arg); - __tlbi_user(vale1, arg); + __tlbi_wrapper(vale1, arg); + __tlbi_user_wrapper(vale1, arg); } -static __always_inline void vale1is(u64 arg) +static __always_inline void vale1is(tlbi_arg_t arg) { - __tlbi(vale1is, arg); - __tlbi_user(vale1is, arg); + __tlbi_wrapper(vale1is, arg); + __tlbi_user_wrapper(vale1is, arg); } -static __always_inline void vale2is(u64 arg) +static __always_inline void vale2is(tlbi_arg_t arg) { - __tlbi(vale2is, arg); + __tlbi_wrapper(vale2is, arg); } -static __always_inline void vaale1is(u64 arg) +static __always_inline void vaale1is(tlbi_arg_t arg) { - __tlbi(vaale1is, arg); + __tlbi_wrapper(vaale1is, arg); } -static __always_inline void ipas2e1(u64 arg) +static __always_inline void ipas2e1(tlbi_arg_t arg) { - __tlbi(ipas2e1, arg); + __tlbi_wrapper(ipas2e1, arg); } -static __always_inline void ipas2e1is(u64 arg) +static __always_inline void ipas2e1is(tlbi_arg_t arg) { - __tlbi(ipas2e1is, arg); + __tlbi_wrapper(ipas2e1is, arg); } static __always_inline void __tlbi_level_asid(tlbi_op op, u64 addr, u32 level, @@ -443,32 +447,32 @@ static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) * operations can only span an even number of pages. We save this for last to * ensure 64KB start alignment is maintained for the LPA2 case. */ -static __always_inline void rvae1is(u64 arg) +static __always_inline void rvae1is(tlbi_arg_t arg) { - __tlbi(rvae1is, arg); - __tlbi_user(rvae1is, arg); + __tlbi_wrapper(rvae1is, arg); + __tlbi_user_wrapper(rvae1is, arg); } -static __always_inline void rvale1(u64 arg) +static __always_inline void rvale1(tlbi_arg_t arg) { - __tlbi(rvale1, arg); - __tlbi_user(rvale1, arg); + __tlbi_wrapper(rvale1, arg); + __tlbi_user_wrapper(rvale1, arg); } -static __always_inline void rvale1is(u64 arg) +static __always_inline void rvale1is(tlbi_arg_t arg) { - __tlbi(rvale1is, arg); - __tlbi_user(rvale1is, arg); + __tlbi_wrapper(rvale1is, arg); + __tlbi_user_wrapper(rvale1is, arg); } -static __always_inline void rvaale1is(u64 arg) +static __always_inline void rvaale1is(tlbi_arg_t arg) { - __tlbi(rvaale1is, arg); + __tlbi_wrapper(rvaale1is, arg); } -static __always_inline void ripas2e1is(u64 arg) +static __always_inline void ripas2e1is(tlbi_arg_t arg) { - __tlbi(ripas2e1is, arg); + __tlbi_wrapper(ripas2e1is, arg); } static __always_inline void __tlbi_range(tlbi_op op, u64 addr, -- 2.43.0