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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BK1r/nZOWumKhp01NvJaIOvAke6/uWN7AKuIc2lKbEKvgjJQ4E/iDqW0rzeM2ri22 SVz1SVyp3OdpFAZmK1r3EptEcXTuE/M4EhYZ/3OujVAzKSZczu9YQz3upKIndTR+UJ +LQIu5yTabYFIydvi9zFkLedoS/VoWie77P8uerg= From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , David Hildenbrand , Mike Rapoport , Andrew Morton , Lorenzo Stoakes , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH V2 1/2] arm64/mm: Move __check_safe_pte_update() Date: Wed, 9 Sep 2026 09:30:04 +0530 Message-ID: <20260909040005.4148136-2-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260909040005.4148136-1-anshuman.khandual@arm.com> References: <20260909040005.4148136-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 22382140002 X-Stat-Signature: mfcu71tnwqnne9wik5u8p3ye7zz5i3oq X-Rspam-User: X-HE-Tag: 1788926414-115620 X-HE-Meta: U2FsdGVkX1+wkZ1RzTi50t7uOaHgRTj8toT/I7kUvnXsPLlKqsKTC+UHbU2efd5/MQll7qqSRIGv2aCUtiPUtvXhuV6vUdkpm9nxezUhmU0ao6wYrwFCkCmuEAaOz171qy3tTn4528uVzxZYM3TuenWZJWz2lQ8zw/ZiTCq3Eqb3X7b54hIEqzjjHOOZqGa2gVddQ7TdxdV9mI+Qzk7XKG/YAMOXEwPDSWCd9R/zoXVDywmBvBG3vcSWoNdJEMdx2Jx77ilHZUNL2EJtdiSXBTZzExFDMrId0FbDy07jOex68Dk1JUGAWiOxRevoV7U9XmiVBJPqXjiSScIzUFI8cllG/WBGIy7oh6u6Pq/f6bke5O+vapRLWK3DypYmURTf9MlHIkv3X4K3cdK3lDe4ilWoMrTSi7AZWbnowK+0oyEHM3VsURpt82+I5Fpdu9ANXV7r6yRDrfdaJ+LIu28cyieDPyOI69npaHHb8IhxXrf6HtfM32FciPSo/emMdPBi9al7/eHZRf1TOD0OqSatAjRVZbbQO8zUI6aR07aDS+qMh796Cu0e10rUr98PbT+tL9NnpB7eeldSN8qTM2vYgh33rjaUkW+jvH74QQbW7KxpP23IIKc5o5zLLY8OKiXhSWZ4NMzWe0I3I4xwCH/E3dhHZYN9dlRtzHiykYsfkWkHdM8vVJN77JhwfEj/R+xr8ZAS71Zz6liHYQu12tuOJAia9HPNbkBmj3KPff80eaUDVDLVCIPcxe3lgw2D8y/Sr1qIaz1xbq8xOA9BgKpeDwUya2tDFze27032Zpd1JY3GllHuCq5UtDN730xeMCDgkNLVDuUwhLXefHBRnvYqK/5HdCKK/HIEJFNXuYaDs/tKyUJotIrfjTJ2nxi1ahyglJBtBRTF6MGXjwAjcXeAtxWojRAlnPWboETXV0zRNHlaIAlKs9pDMR4fti/IX3X551mvzr/vPJa3ugsX9T3 tIVVsgwa x5uG5IpsES7lnVDF72hffAYgXrXkdltz7lNI/AJKBaSrULo5kbr4KB4umLlac3JWqKkrz6VUNl5yP7qcDzSMLahXExacgYDonpMG6mvjErmloRrhDyWhFfCZVLA4M0KpwJTXfseWtxd8h8fT18LUwsHOc8uQ/iZIx+JV7Fj/Oye9EKVzMCajxe+ZKWfn22WQwU20Qv5FIUBUH6HcwkdOplSF2EDUb0Hv5VW7vjQ2nqt//A4kZi+PXiycqIEDHNPDwk5rKz99v64Ld0L/0VaLQD+qAwD+4dBFK4PFqYdhI9/huaDZ18EmqZqtmVCK2/nMCmr/UtLbgXnFBKGye+N/0HQL8770pLlCyG+2eE5QxuuQC6VZS4TvPUy2JLhyaHfnsEUDyMlVCynaG37JDE2RSqh1rMVy9AmBTIPcEHRg4EFl1fOM= Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The page table entry print helpers and related macros which are defined in will not be accessible in platform which is basically caused by cycling dependency. Move __check_safe_pte_update() inside arch/arm64/mm/mmu.c as a preparation for subsequent usage of the afore mentioned generic MM helpers. While here drop IS_ENABLED(CONFIG_DEBUG_VM), although wrap __check_safe_pte_update() inside #ifdef CONFIG_DEBUG_VM that preserves the current code optimization which is achieved via the static inline functions. This does not cause any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- Changes in V2: - Moved __check_safe_pte_update() inside #ifdef CONFIG_DEBUG_VM - Added empty stub for __check_safe_pte_update() when !CONFIG_DEBUG_VM - Dropped IS_ENABLED(CONFIG_DEBUG_VM) from __check_safe_pte_update() arch/arm64/include/asm/pgtable.h | 49 ++++---------------------------- arch/arm64/mm/mmu.c | 44 ++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+), 44 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index e89ec5f4787b..281a512f1fc6 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -387,52 +387,13 @@ static inline pte_t __ptep_get(pte_t *ptep) extern void __sync_icache_dcache(pte_t pteval); bool pgattr_change_is_safe(pteval_t old, pteval_t new); -/* - * PTE bits configuration in the presence of hardware Dirty Bit Management - * (PTE_WRITE == PTE_DBM): - * - * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw) - * 0 0 | 1 0 0 - * 0 1 | 1 1 0 - * 1 0 | 1 0 1 - * 1 1 | 0 1 x - * - * When hardware DBM is not present, the software PTE_DIRTY bit is updated via - * the page fault mechanism. Checking the dirty status of a pte becomes: - * - * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY) - */ - -static inline void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, - pte_t pte) +#ifdef CONFIG_DEBUG_VM +void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte); +#else +static inline void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte) { - pte_t old_pte; - - if (!IS_ENABLED(CONFIG_DEBUG_VM)) - return; - - old_pte = __ptep_get(ptep); - - if (!pte_valid(old_pte) || !pte_valid(pte)) - return; - if (mm != current->active_mm && atomic_read(&mm->mm_users) <= 1) - return; - - /* - * Check for potential race with hardware updates of the pte - * (__ptep_set_access_flags safely changes valid ptes without going - * through an invalid entry). - */ - VM_WARN_ONCE(!pte_young(pte), - "%s: racy access flag clearing: 0x%016llx -> 0x%016llx", - __func__, pte_val(old_pte), pte_val(pte)); - VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte), - "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx", - __func__, pte_val(old_pte), pte_val(pte)); - VM_WARN_ONCE(!pgattr_change_is_safe(pte_val(old_pte), pte_val(pte)), - "%s: unsafe attribute change: 0x%016llx -> 0x%016llx", - __func__, pte_val(old_pte), pte_val(pte)); } +#endif static inline void __sync_cache_and_tags(pte_t pte, unsigned int nr_pages) { diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 79d90226fd5d..0b2d190d62c3 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -2392,4 +2392,48 @@ int arch_set_user_pkey_access(int pkey, unsigned long init_val) return 0; } + +/* + * PTE bits configuration in the presence of hardware Dirty Bit Management + * (PTE_WRITE == PTE_DBM): + * + * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw) + * 0 0 | 1 0 0 + * 0 1 | 1 1 0 + * 1 0 | 1 0 1 + * 1 1 | 0 1 x + * + * When hardware DBM is not present, the software PTE_DIRTY bit is updated via + * the page fault mechanism. Checking the dirty status of a pte becomes: + * + * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY) + */ +#ifdef CONFIG_DEBUG_VM +void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte) +{ + pte_t old_pte; + + old_pte = __ptep_get(ptep); + + if (!pte_valid(old_pte) || !pte_valid(pte)) + return; + if (mm != current->active_mm && atomic_read(&mm->mm_users) <= 1) + return; + + /* + * Check for potential race with hardware updates of the pte + * (__ptep_set_access_flags safely changes valid ptes without going + * through an invalid entry). + */ + VM_WARN_ONCE(!pte_young(pte), + "%s: racy access flag clearing: 0x%016llx -> 0x%016llx", + __func__, pte_val(old_pte), pte_val(pte)); + VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte), + "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx", + __func__, pte_val(old_pte), pte_val(pte)); + VM_WARN_ONCE(!pgattr_change_is_safe(pte_val(old_pte), pte_val(pte)), + "%s: unsafe attribute change: 0x%016llx -> 0x%016llx", + __func__, pte_val(old_pte), pte_val(pte)); +} +#endif #endif -- 2.43.0