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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-49597371cc4sm5861840f8f.36.2026.11.08.13.32.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Nov 2026 13:32:56 -0800 (PST) Date: Sun, 8 Nov 2026 21:32:54 +0000 From: David Laight To: Yunhui Cui Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, dennis@kernel.org, tj@kernel.org, cl@gentwo.org, ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org, martin.lau@linux.dev, eddyz87@gmail.com, memxor@gmail.com, song@kernel.org, yonghong.song@linux.dev, jolsa@kernel.org, bjorn@kernel.org, pulehui@huawei.com, puranjay@kernel.org, thuth@redhat.com, ajones@ventanamicro.com, ben.dooks@codethink.co.uk, rkrcmar@ventanamicro.com, samuel.holland@sifive.com, zong.li@sifive.com, conor.dooley@microchip.com, tglx@kernel.org, debug@rivosinc.com, seanwascoding@gmail.com, andybnac@gmail.com, menglong8.dong@gmail.com, cyrilbur@tenstorrent.com, wangruikang@iscas.ac.cn, atishp@rivosinc.com, apatel@ventanamicro.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, bpf@vger.kernel.org, arnd@arndb.de, nathan@kernel.org, nick.desaulniers+lkml@gmail.com, morbo@google.com, justinstitt@google.com, qingfang.deng@siflower.com.cn, linux-arch@vger.kernel.org, llvm@lists.linux.dev, dave@stgolabs.net, emil@etsalapatis.com, ihor.solodrai@linux.dev, broonie@kernel.org Subject: Re: [PATCH v9 1/3] riscv: implement this_cpu operations Message-ID: <20261108213254.67805ef0@pumpkin> In-Reply-To: <20261108110406.97495-2-cuiyunhui@bytedance.com> References: <20261108110406.97495-1-cuiyunhui@bytedance.com> <20261108110406.97495-2-cuiyunhui@bytedance.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 0C8E2C0003 X-Spam-Status: No, score=-4.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=4.0.1 X-Stat-Signature: be8t7sxmgtsmnj74y81i75j7c4t5ipo1 X-HE-Tag: 1794173577-47380 X-HE-Meta: U2FsdGVkX19iKeLMG4aFDbZ/WCpd+Gtq2Vj3ODAjjw5Vu5w96/AJ5GYqfGJTOcWRtKQ+oJS34w1NtUPZYfLU1P8/xC1TRD6QvRK4nTQOHpKLK8MMtJ4/6WsHY4VC2YE7FHBpHtvboOZeW6k415NfCVQT5CAgmwqYHQ3r/okqiQiaplQMTWtiUprlLCmPnNN0fbZzlfrolP+dkCFg6z5TMZJ3vP6gzTfNKXGH73LFvHctp3r2/80iRYUY+pMNUCEJv/br245j3eKIOVcqm7sNzKbvJq097YwsSPy72QDHMxug/aoAC0yIiA9BsLAk4Thb0zPDYGs2VNyD8P9tmNlwJRo6Xm/vR9iZWvUPq+cxcDZz71AQcmqugNKLa35TKt2oPzQ6tB4z8K59MdH6TVcSRa5gWE3bLjrAzypqzwkPqot4nWXWm9E/dpt82EGSA/piu2ezIXqenWkE4ZRFGdlGPBGM3kGV/V8GteoXyxXP2/4bREMNk6OCsq3/ULcM6pWVkFwmZwMlAmmsGLRfwQd0tQJSfaEt+S41fIFg13dRMbWtMnlYR4J/NMGWr2+Y06SP7g7aSpdlB11lKh8Bw1qTAdeZREFA/CzzXzu/hGndNBzkQLtpaSzGLSnv3I0BcVtJwY4f0GcFnYcsyL4dHqKK7Qixt1EKsrQIlmWMVfABKMPjxGOpgTGT4+VZgZ382H1datgF1EZJ3lH4jFhQNg/aUhZ60kBgYQl3X/ZCdPHUfy2nOjMnQnu99Xk/dPxS0gW9NHVie4UEKti7UgwYDUEBtV81p0e0VuN3V3sAGKZ1UlsLofA8mXkw8oEhxlFev3CQnwae4rfLN7zZYOt/iqCH9BDqkWNAFLgvcqXw39+jaknyF6xIv2KiKe1zF28+puvjIref5SBufyeXQRb0ma88j7ZvYo4zaE/9zAr8DuAR2s4tTFPHkHCtkkEfFRX6iygh0npmu2tdOfTre3P/53i DlLQxb5h 2NZPQP4T9CT1AAH7JaSSFu43mtbfIBAWOcZ5Ol7AtRMjhYz42DSoJlxwqtZwgtmszWL+Luqwm1gFRCTDa4WOzXvVjCs/b+qwkkLwYAXGiA/V8mBeWAfhiA3quQNDV4R3DU56CBkXq3ik6s5Iva6wb+lJ+UrgsjCUuZuBNML5P8QDw0WUXnuPQx+iNEJ5G1Reqn532MObT5/MfJ/sntEqOSOC1QQ1nGzF5H+BI3WsjBK4oquvxN0HeEZ/GlLzBW8wJcVOc/xiPwk76FBC05xAliEUZPEse4HUOlfxkn3L2FVYHagtfN5beb9tb6iKqMAzfpQnh8MMjGTtjvxIhnvN5OOAk+1u9M6uHqVEeRHBT7qMklGH2jGIVFCWz6GBGWgSBQpcrTv1MOcWXtM1YsMS+YWWzM5iyA+oElMnZ/k8wySW8T/G9sEujfQMHpqFVE9fkfC80r4Li7ydzwATyKk3iVVmtQX4CnBRsap3t0ZdwAH5+8MLy1B2pTT8tvYzTiCrWm3fGe/IMkd05MSgezFjJFDXezFQZJeNZYnivQlSjiZ7CzZlR+CxI/8Yrqh6819ZQ2zTCDxLu1+S5C/E= Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Sun, 8 Nov 2026 19:04:04 +0800 Yunhui Cui wrote: > RISC-V has no asm/percpu.h, so this_cpu_*() read-modify-write > operations use generic implementations that disable local interrupts. > > Implement RISC-V-specific this_cpu operations with preemption disabled > to keep accesses on the current CPU. Have you looked at some of the schemes (I think arm64 has the latest, but also s390) that do most per-cpu ops without disabling preemption. In particular they save the pre-emption check when pre-emption is enabled. Basically the code tells the scheduler which register contains the per-cpu data so that it can be 'magically' flipped during a context switch. David