From: Jason Gunthorpe <jgg@nvidia.com>
To: "Gregory Price (Meta)" <gourry@gourry.net>
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
kernel-team@meta.com, leon@kernel.org, akpm@linux-foundation.org,
david@kernel.org, kas@kernel.org, dave.hansen@linux.intel.com,
bp@alien8.de, rppt@kernel.org, stable@vger.kernel.org,
"Lorenzo Stoakes (ARM)" <ljs@kernel.org>
Subject: Re: [PATCH] mm/hmm: reject shadow-stack mappings
Date: Fri, 13 Nov 2026 16:03:03 -0400 [thread overview]
Message-ID: <20261113200303.GA395967@nvidia.com> (raw)
In-Reply-To: <20261113195536.2660763-1-gourry@gourry.net>
On Fri, Nov 13, 2026 at 02:55:36PM -0500, Gregory Price (Meta) wrote:
> HMM can grant ordinary device write access to a userspace shadow stack.
> On x86, pte_write() is true for a shadow-stack PTE, so a populated page
> can be returned with HMM_PFN_WRITE without taking a CPU write fault.
I'm not sure I understand this? The pte is writable but you don't want
only DMA to write to it?
Is there something special on x86 that makes the shadow stack pte
non-writable by the CPU?
A few more words here would help
Regardless, this seems reasonable to me, there is no use case to
write to the shadow stack..
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Jason
next prev parent reply other threads:[~2026-11-13 20:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 19:55 [PATCH] mm/hmm: reject shadow-stack mappings Gregory Price (Meta)
2026-11-13 19:57 ` Lorenzo Stoakes (ARM)
2026-11-13 20:15 ` Gregory Price (Meta)
2026-11-13 20:03 ` Jason Gunthorpe [this message]
2026-11-13 20:41 ` Gregory Price (Meta)
2026-11-13 20:03 ` David Hildenbrand (Arm)
2026-11-13 20:42 ` Gregory Price (Meta)
2026-11-13 21:19 ` David Hildenbrand (Arm)
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