Re: [PATCH] x86: add phys addr validity check for /dev/mem mmap

[Dave Hansen <dave.hansen@intel.com>]

On 04/27/2013 08:17 PM, Will Huck wrote:
>>     PTE bits 51 - M are reserved, where M is physical address width
>> found 2)
>>     Note: step 2) is actually not needed, we can always set just the
>> 51th bit
>>     (0x8000000000000)
> 
> What's the meaning here? You trigger oops since the address is beyond
> max address cpu supported or access to a reserved page? If the answer is
> the latter, I'm think it's not right. For example, the kernel code/data
> section is reserved in memory, kernel access it will trigger oops? I
> don't think so.

I think you're confusing the original problem here with how we would
implement the solution.

/dev/mem essentially lets you create ptes with as large of a value as
you like.  You just mmap() it, and the kernel will build you a pte to
access whatever crazy offset you choose.

The problem is that on _some_ systems, you won't just get a bus error,
the kernel actually sets up some ptes which the hardware objects to (the
reserved bits in the pte), and we'll panic when the hardware sees the
ptes.  We're trying to avoid these panics by ensuring that we never
create these nasty ptes.

Those "nasty" PTEs point to memory which can not even possibly be
*addressed* on the CPUs where they upset the hardware.  In other words,
if we limit /dev/mem to *possible* memory on the system (which is sane
all by itself) we will also fix this particular problem.


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