From: Alex Shi <alex.shi@linaro.org>
To: Ingo Molnar <mingo@kernel.org>
Cc: Mel Gorman <mgorman@suse.de>, H Peter Anvin <hpa@zytor.com>,
Linux-X86 <x86@kernel.org>, Linux-MM <linux-mm@kvack.org>,
LKML <linux-kernel@vger.kernel.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Thomas Gleixner <tglx@linutronix.de>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Fengguang Wu <fengguang.wu@intel.com>
Subject: Re: [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge
Date: Fri, 13 Dec 2013 10:11:05 +0800 [thread overview]
Message-ID: <52AA6CB9.60302@linaro.org> (raw)
In-Reply-To: <52AA5C92.7030207@linaro.org>
On 12/13/2013 09:02 AM, Alex Shi wrote:
>> > You have not replied to this concern of mine: if my concern is valid
>> > then that invalidates much of the current tunings.
> The benefit from pretend flush range is not unconditional, since invlpg
> also cost time. And different CPU has different invlpg/flush_all
> execution time.
TLB refill time is also different on different kind of cpu.
BTW,
A bewitching idea is till attracting me.
https://lkml.org/lkml/2012/5/23/148
Even it was sentenced to death by HPA.
https://lkml.org/lkml/2012/5/24/143
That is that just flush one of thread TLB is enough for SMT/HT, seems
TLB is still shared in core on Intel CPU. This benefit is unconditional,
and if my memory right, Kbuild testing can improve about 1~2% in average
level.
So could you like to accept some ugly quirks to do this lazy TLB flush
on known working CPU?
Forgive me if it's stupid.
--
Thanks
Alex
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next prev parent reply other threads:[~2013-12-13 2:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-12 11:55 [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 TLB range flush Mel Gorman
2013-12-12 11:55 ` [PATCH 1/3] x86: mm: Clean up inconsistencies when flushing TLB ranges Mel Gorman
2013-12-12 13:59 ` Alex Shi
2013-12-12 23:53 ` Mel Gorman
2013-12-12 11:55 ` [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge Mel Gorman
2013-12-12 13:13 ` Ingo Molnar
2013-12-12 13:38 ` Alex Shi
2013-12-12 14:11 ` Ingo Molnar
2013-12-13 1:02 ` Alex Shi
2013-12-13 2:11 ` Alex Shi [this message]
2013-12-13 13:43 ` Ingo Molnar
2013-12-14 11:01 ` Alex Shi
2013-12-14 14:19 ` Peter Zijlstra
2013-12-14 14:27 ` Peter Zijlstra
2013-12-16 13:59 ` Ingo Molnar
2013-12-17 11:59 ` Alex Shi
2013-12-17 13:14 ` Ingo Molnar
2013-12-16 8:26 ` Alex Shi
2013-12-16 10:06 ` Peter Zijlstra
2013-12-12 13:45 ` Alex Shi
2013-12-12 11:55 ` [PATCH 3/3] x86: mm: Account for the of CPUs that must be flushed during a TLB range flush Mel Gorman
2013-12-12 13:41 ` Alex Shi
2013-12-12 13:01 ` [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 " Ingo Molnar
2013-12-12 14:40 ` Mel Gorman
2013-12-13 13:35 ` Ingo Molnar
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