From: Alex Shi <alex.shi@linaro.org>
To: Ingo Molnar <mingo@kernel.org>
Cc: Mel Gorman <mgorman@suse.de>, H Peter Anvin <hpa@zytor.com>,
Linux-X86 <x86@kernel.org>, Linux-MM <linux-mm@kvack.org>,
LKML <linux-kernel@vger.kernel.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Thomas Gleixner <tglx@linutronix.de>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Fengguang Wu <fengguang.wu@intel.com>
Subject: Re: [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge
Date: Sat, 14 Dec 2013 19:01:34 +0800 [thread overview]
Message-ID: <52AC3A8E.7040603@linaro.org> (raw)
In-Reply-To: <20131213134304.GB11176@gmail.com>
On 12/13/2013 09:43 PM, Ingo Molnar wrote:
>
> * Alex Shi <alex.shi@linaro.org> wrote:
>
>> On 12/13/2013 09:02 AM, Alex Shi wrote:
>>>>> You have not replied to this concern of mine: if my concern is valid
>>>>> then that invalidates much of the current tunings.
>>> The benefit from pretend flush range is not unconditional, since invlpg
>>> also cost time. And different CPU has different invlpg/flush_all
>>> execution time.
>>
>> TLB refill time is also different on different kind of cpu.
>>
>> BTW,
>> A bewitching idea is till attracting me.
>> https://lkml.org/lkml/2012/5/23/148
>> Even it was sentenced to death by HPA.
>> https://lkml.org/lkml/2012/5/24/143
>
> I don't think it was sentenced to death by HPA. What do the hardware
> guys say, is this safe on current CPUs?
This talking is fully public, no any other info I known.
At that time, I tried core2, nhm, wsm, snd, ivb, all kinds of machine I
can get. No issue found.
And assuming a rebase patch is testing in Fengguang's testing system
from last Friday, no bad news till now.
Fengugang, x86-tlb branch on my github tree.
>
> If yes then as long as we only activate this optimization for known
> models (and turn it off for unknown models) we should be pretty safe,
> even if the hw guys (obviously) don't want to promise this
> indefinitely for all Intel HT implementations in the future, right?
Agree with you.
>
>> That is that just flush one of thread TLB is enough for SMT/HT,
>> seems TLB is still shared in core on Intel CPU. This benefit is
>> unconditional, and if my memory right, Kbuild testing can improve
>> about 1~2% in average level.
>
> Oh, a 1-2% kbuild speedup is absolutely _massive_. Don't even think
> about dropping this idea ... it needs to be explored.
>
> Alas, that for_each_cpu() loop is obviously disgusting, these values
> should be precalculated into percpu variables and such.
yes, pr-calcucatied variable would save much time.
>
>> So could you like to accept some ugly quirks to do this lazy TLB
>> flush on known working CPU?
>
> it's not really 'lazy TLB flush' AFAICS but a genuine optimization:
> only flush the TLB on the logical CPUs that need it, right? I.e. do
> only one flush per pair of siblings.
>
>> Forgive me if it's stupid.
>
> I'd say measurable speedups that are safe are never ever stupid.
Thanks a lot!
>
> And even the range-flush TLB optimization we are talking about here
> could still be used IMO, just tone it down a bit and make it less
> model dependent.
>
> Thanks,
>
> Ingo
>
--
Thanks
Alex
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next prev parent reply other threads:[~2013-12-14 11:01 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-12 11:55 [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 TLB range flush Mel Gorman
2013-12-12 11:55 ` [PATCH 1/3] x86: mm: Clean up inconsistencies when flushing TLB ranges Mel Gorman
2013-12-12 13:59 ` Alex Shi
2013-12-12 23:53 ` Mel Gorman
2013-12-12 11:55 ` [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge Mel Gorman
2013-12-12 13:13 ` Ingo Molnar
2013-12-12 13:38 ` Alex Shi
2013-12-12 14:11 ` Ingo Molnar
2013-12-13 1:02 ` Alex Shi
2013-12-13 2:11 ` Alex Shi
2013-12-13 13:43 ` Ingo Molnar
2013-12-14 11:01 ` Alex Shi [this message]
2013-12-14 14:19 ` Peter Zijlstra
2013-12-14 14:27 ` Peter Zijlstra
2013-12-16 13:59 ` Ingo Molnar
2013-12-17 11:59 ` Alex Shi
2013-12-17 13:14 ` Ingo Molnar
2013-12-16 8:26 ` Alex Shi
2013-12-16 10:06 ` Peter Zijlstra
2013-12-12 13:45 ` Alex Shi
2013-12-12 11:55 ` [PATCH 3/3] x86: mm: Account for the of CPUs that must be flushed during a TLB range flush Mel Gorman
2013-12-12 13:41 ` Alex Shi
2013-12-12 13:01 ` [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 " Ingo Molnar
2013-12-12 14:40 ` Mel Gorman
2013-12-13 13:35 ` Ingo Molnar
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