From: Dan Williams <dan.j.williams@intel.com>
To: Gregory Price <gregory.price@memverge.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dave.hansen@linux.intel.com>,
<linux-mm@kvack.org>, <linux-acpi@vger.kernel.org>
Subject: Re: [PATCH 04/18] cxl/region: Validate region mode vs decoder mode
Date: Mon, 6 Feb 2023 13:51:18 -0800 [thread overview]
Message-ID: <63e1765622185_e3dae2941f@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <Y+EuYzk2Ro7WBEhz@memverge.com>
Gregory Price wrote:
> On Sun, Feb 05, 2023 at 05:02:51PM -0800, Dan Williams wrote:
> > In preparation for a new region mode, do not, for example, allow
> > 'ram' decoders to be assigned to 'pmem' regions and vice versa.
> >
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > ---
> > drivers/cxl/core/region.c | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> > index c9e7f05caa0f..53d6dbe4de6d 100644
> > --- a/drivers/cxl/core/region.c
> > +++ b/drivers/cxl/core/region.c
> > @@ -1217,6 +1217,12 @@ static int cxl_region_attach(struct cxl_region *cxlr,
> > struct cxl_dport *dport;
> > int i, rc = -ENXIO;
> >
> > + if (cxled->mode != cxlr->mode) {
> > + dev_dbg(&cxlr->dev, "%s region mode: %d mismatch: %d\n",
> > + dev_name(&cxled->cxld.dev), cxlr->mode, cxled->mode);
> > + return -EINVAL;
> > + }
> > +
> > if (cxled->mode == CXL_DECODER_DEAD) {
> > dev_dbg(&cxlr->dev, "%s dead\n", dev_name(&cxled->cxld.dev));
> > return -ENODEV;
> >
>
>
> Maybe a stupid question. It will be entirely possible to "convert" pmem
> to "ram" (i.e. just online it as system memory).
That's a good question, there are two mechanisms for this:
1/ Use ndctl to assign the resulting pmem namespace to devdax mode and
then use dax_kmem to online that persistent memory.
2/ If the CXL device supports partitioning ram vs pmem capacity: tear down
the pmem region ('cxl destroy-region ...'), repartition the pmem ('cxl
set-partition -t ram ...'), create a new ram region ('cxl create-region
...').
> Are type-3 devices with pmem expected to carry 2 decoders (one ram, 1
> pmem), such that you can create a ram region from pmem, or is it expected
> that the pmem decoder will be used for pmem, even if it gets onlined
> as volatile?
Not sure there are any formal expectations when it comes to number of
decoders.
> Just asking because depending on how that flushes out, you might
> expected a "ram region" to get assigned to a "pmem decoder", unless
> you're expecting all pmem-carrying-devices to create 2 decoders per pmem
> region depending on how the end user intends to use it.
Per 2/ above even with a 1-decoder-device there is a spec-defined
mechanism to assign all of the device's capacity to ram.
next prev parent reply other threads:[~2023-02-06 21:51 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-06 1:02 [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default Dan Williams
2023-02-06 1:02 ` [PATCH 01/18] cxl/Documentation: Update references to attributes added in v6.0 Dan Williams
2023-02-06 15:17 ` Jonathan Cameron
2023-02-06 16:37 ` Gregory Price
2023-02-06 17:27 ` [PATCH 1/18] " Davidlohr Bueso
2023-02-06 19:15 ` [PATCH 01/18] " Ira Weiny
2023-02-06 21:04 ` Dave Jiang
2023-02-09 0:20 ` Verma, Vishal L
2023-02-06 1:02 ` [PATCH 02/18] cxl/region: Add a mode attribute for regions Dan Williams
2023-02-06 15:46 ` Jonathan Cameron
2023-02-06 17:47 ` Dan Williams
2023-02-06 16:39 ` Gregory Price
2023-02-06 19:16 ` Ira Weiny
2023-02-06 21:05 ` Dave Jiang
2023-02-09 0:22 ` Verma, Vishal L
2023-02-06 1:02 ` [PATCH 03/18] cxl/region: Support empty uuids for non-pmem regions Dan Williams
2023-02-06 15:54 ` Jonathan Cameron
2023-02-06 18:07 ` Dan Williams
2023-02-06 19:22 ` Ira Weiny
2023-02-06 19:35 ` Dan Williams
2023-02-09 0:24 ` Verma, Vishal L
2023-02-06 1:02 ` [PATCH 04/18] cxl/region: Validate region mode vs decoder mode Dan Williams
2023-02-06 16:02 ` Jonathan Cameron
2023-02-06 18:14 ` Dan Williams
2023-02-06 16:44 ` Gregory Price
2023-02-06 21:51 ` Dan Williams [this message]
2023-02-06 19:55 ` Gregory Price
2023-02-06 19:23 ` Ira Weiny
2023-02-06 22:16 ` Dave Jiang
2023-02-09 0:25 ` Verma, Vishal L
2023-02-06 1:02 ` [PATCH 05/18] cxl/region: Add volatile region creation support Dan Williams
2023-02-06 16:18 ` Jonathan Cameron
2023-02-06 18:19 ` Dan Williams
2023-02-06 16:55 ` Gregory Price
2023-02-06 21:57 ` Dan Williams
2023-02-06 19:56 ` Gregory Price
2023-02-06 19:25 ` Ira Weiny
2023-02-06 22:31 ` Dave Jiang
2023-02-06 22:37 ` Dan Williams
2023-02-09 1:02 ` Verma, Vishal L
2023-02-06 1:03 ` [PATCH 06/18] cxl/region: Refactor attach_target() for autodiscovery Dan Williams
2023-02-06 17:06 ` Jonathan Cameron
2023-02-06 18:48 ` Dan Williams
2023-02-06 19:26 ` Ira Weiny
2023-02-06 22:41 ` Dave Jiang
2023-02-09 1:09 ` Verma, Vishal L
2023-02-06 1:03 ` [PATCH 07/18] cxl/region: Move region-position validation to a helper Dan Williams
2023-02-06 17:44 ` Ira Weiny
2023-02-06 19:15 ` Dan Williams
2023-02-08 12:30 ` Jonathan Cameron
2023-02-09 4:09 ` Dan Williams
2023-02-09 4:26 ` Dan Williams
2023-02-09 11:07 ` Jonathan Cameron
2023-02-09 20:52 ` Dan Williams
2023-02-09 19:45 ` Verma, Vishal L
2023-02-06 1:03 ` [PATCH 08/18] kernel/range: Uplevel the cxl subsystem's range_contains() helper Dan Williams
2023-02-06 17:02 ` Gregory Price
2023-02-06 22:01 ` Dan Williams
2023-02-06 19:28 ` Ira Weiny
2023-02-06 23:41 ` Dave Jiang
2023-02-08 12:32 ` Jonathan Cameron
2023-02-09 19:47 ` Verma, Vishal L
2023-02-06 1:03 ` [PATCH 09/18] cxl/region: Enable CONFIG_CXL_REGION to be toggled Dan Williams
2023-02-06 17:03 ` Gregory Price
2023-02-06 23:57 ` Dave Jiang
2023-02-08 12:36 ` Jonathan Cameron
2023-02-09 20:17 ` Verma, Vishal L
2023-02-06 1:03 ` [PATCH 10/18] cxl/region: Fix passthrough-decoder detection Dan Williams
2023-02-06 5:38 ` Greg KH
2023-02-06 17:22 ` Dan Williams
2023-02-07 0:00 ` Dave Jiang
2023-02-08 12:44 ` Jonathan Cameron
2023-02-09 20:28 ` Verma, Vishal L
2023-02-06 1:03 ` [PATCH 11/18] cxl/region: Add region autodiscovery Dan Williams
2023-02-06 19:02 ` Ira Weiny
2023-02-07 23:54 ` Dave Jiang
2023-02-08 17:07 ` Jonathan Cameron
2023-02-09 4:07 ` Dan Williams
2023-02-06 1:03 ` [PATCH 12/18] tools/testing/cxl: Define a fixed volatile configuration to parse Dan Williams
2023-02-08 17:31 ` Jonathan Cameron
2023-02-09 20:50 ` Dan Williams
2023-02-06 1:03 ` [PATCH 13/18] dax/hmem: Move HMAT and Soft reservation probe initcall level Dan Williams
2023-02-06 1:03 ` [PATCH 14/18] dax/hmem: Drop unnecessary dax_hmem_remove() Dan Williams
2023-02-06 17:15 ` Gregory Price
2023-02-08 17:33 ` Jonathan Cameron
2023-02-06 1:03 ` [PATCH 15/18] dax/hmem: Convey the dax range via memregion_info() Dan Williams
2023-02-08 17:35 ` Jonathan Cameron
2023-02-06 1:03 ` [PATCH 16/18] dax/hmem: Move hmem device registration to dax_hmem.ko Dan Williams
2023-02-06 1:04 ` [PATCH 17/18] dax: Assign RAM regions to memory-hotplug by default Dan Williams
2023-02-06 17:26 ` Gregory Price
2023-02-06 22:15 ` Dan Williams
2023-02-06 19:05 ` Gregory Price
2023-02-06 23:20 ` Dan Williams
2023-02-06 1:04 ` [PATCH 18/18] cxl/dax: Create dax devices for CXL RAM regions Dan Williams
2023-02-06 5:36 ` [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default Gregory Price
2023-02-06 16:40 ` Davidlohr Bueso
2023-02-06 18:23 ` Dan Williams
2023-02-06 17:29 ` Dan Williams
2023-02-06 17:18 ` Davidlohr Bueso
[not found] ` <CGME20230208173730uscas1p2af3a9eeb8946dfa607b190c079a49653@uscas1p2.samsung.com>
2023-02-08 17:37 ` Fan Ni
2023-02-09 4:56 ` Dan Williams
2023-02-13 12:13 ` David Hildenbrand
2023-02-14 18:45 ` Dan Williams
2023-02-14 18:27 ` Gregory Price
2023-02-14 18:39 ` Dan Williams
2023-02-14 19:01 ` Gregory Price
2023-02-14 21:18 ` Jonathan Cameron
2023-02-14 21:51 ` Gregory Price
2023-02-14 21:54 ` Gregory Price
2023-02-15 10:03 ` Jonathan Cameron
2023-02-18 9:47 ` Gregory Price
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