From: Thomas Gleixner <tglx@linutronix.de>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dave Hansen <dave.hansen@intel.com>,
"H.J. Lu" <hjl.tools@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
Alexander Potapenko <glider@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
Andi Kleen <ak@linux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Linux-MM <linux-mm@kvack.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [RFCv2 00/10] Linear Address Masking enabling
Date: Fri, 13 May 2022 11:26:59 +0200 [thread overview]
Message-ID: <8735hdu6jg.ffs@tglx> (raw)
In-Reply-To: <Yn4hYSVSHvWGZCOo@arm.com>
On Fri, May 13 2022 at 10:14, Catalin Marinas wrote:
> On Fri, May 13, 2022 at 03:27:24AM +0200, Thomas Gleixner wrote:
>> On Thu, May 12 2022 at 17:46, Dave Hansen wrote:
>> > On 5/12/22 17:08, H.J. Lu wrote:
>> > If I had to take a shot at this today, I think I'd opt for:
>> >
>> > mask = sys_enable_masking(bits=6, flags=FUZZY_NR_BITS);
>> >
>> > although I'm not super confident about the "fuzzy" flag. I also don't
>> > think I'd totally hate the "blind" interface where the kernel just gets
>> > to pick unilaterally and takes zero input from userspace.
>>
>> That's the only sane choice and you can make it simple for userspace:
>>
>> ret = prctl(GET_XXX_MASK, &mask);
>>
>> and then let it decide based on @ret and @mask whether to use it or not.
>
> Getting the mask would work for arm64 as well (it's always 0xffUL << 56,
> top-byte-ignore). Setting the mask from user space won't be of any use
> to us, it's baked in hardware.
Sure.
> Dave indeed mentioned passing a mask to allow a more flexible control
> but, as already mentioned in the old thread, for arm64 the feature was
> already on, so it didn't make much sense, it seemed more like
> over-engineering. Had we known that Intel is pursing something similar,
> maybe we'd have designed the interface differently (we didn't get the
> hint).
Fair enough
> Intel's LAM has more flexibility but I don't see the arm64 TBI getting
> in the way. Just don't use it as an example because they evolved in
> different ways. I'm happy for arm64 to adopt a more flexible interface
> while keeping the current one around for backwards compatibility). But
> on arm64 we can't control the masking, not even disable it per process
> since it has always been on.
That's fine. The point is that we want uniform interfaces for the same
functionality. It's obviously hardware specific which subset of the
interface is supported.
>> I'm so tired of this short sighted 'cram my feature in' approach of
>> _all_ involved parties.
>
> Unfortunately it happens occasionally, especially when developers can't
> disclose that their companies work on similar features (resctrl is a
> good example where arm64 would have benefited from a more generic
> approach but at the time MPAM was not public).
Yeah. It's a constant pain.
Thanks,
tglx
next prev parent reply other threads:[~2022-05-13 9:27 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-11 2:27 [RFCv2 00/10] Linear Address Masking enabling Kirill A. Shutemov
2022-05-11 2:27 ` [PATCH] x86: Implement Linear Address Masking support Kirill A. Shutemov
2022-05-12 13:01 ` David Laight
2022-05-12 14:07 ` Matthew Wilcox
2022-05-12 15:06 ` Thomas Gleixner
2022-05-12 15:33 ` David Laight
2022-05-12 14:35 ` Peter Zijlstra
2022-05-12 17:00 ` Kirill A. Shutemov
2022-05-11 2:27 ` [RFCv2 01/10] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-05-11 2:27 ` [RFCv2 02/10] x86: CPUID and CR3/CR4 flags for Linear Address Masking Kirill A. Shutemov
2022-05-11 2:27 ` [RFCv2 03/10] x86: Introduce userspace API to handle per-thread features Kirill A. Shutemov
2022-05-12 12:02 ` Thomas Gleixner
2022-05-12 12:04 ` [PATCH] x86/prctl: Remove pointless task argument Thomas Gleixner
2022-05-13 14:09 ` [RFCv2 03/10] x86: Introduce userspace API to handle per-thread features Alexander Potapenko
2022-05-13 17:34 ` Edgecombe, Rick P
2022-05-13 23:09 ` Kirill A. Shutemov
2022-05-13 23:50 ` Edgecombe, Rick P
2022-05-14 8:37 ` Thomas Gleixner
2022-05-14 23:06 ` Edgecombe, Rick P
2022-05-15 9:02 ` Thomas Gleixner
2022-05-15 18:24 ` Edgecombe, Rick P
2022-05-15 19:38 ` Thomas Gleixner
2022-05-15 22:01 ` Edgecombe, Rick P
2022-05-11 2:27 ` [RFCv2 04/10] x86/mm: Introduce X86_THREAD_LAM_U48 and X86_THREAD_LAM_U57 Kirill A. Shutemov
2022-05-11 7:02 ` Peter Zijlstra
2022-05-12 12:24 ` Thomas Gleixner
2022-05-12 14:37 ` Peter Zijlstra
2022-05-11 2:27 ` [RFCv2 05/10] x86/mm: Provide untagged_addr() helper Kirill A. Shutemov
2022-05-11 7:21 ` Peter Zijlstra
2022-05-11 7:45 ` Peter Zijlstra
2022-05-12 13:06 ` Thomas Gleixner
2022-05-12 14:23 ` Peter Zijlstra
2022-05-12 15:16 ` Thomas Gleixner
2022-05-12 23:14 ` Thomas Gleixner
2022-05-13 10:14 ` David Laight
2022-05-11 2:27 ` [RFCv2 06/10] x86/uaccess: Remove tags from the address before checking Kirill A. Shutemov
2022-05-12 13:02 ` David Laight
2022-05-11 2:27 ` [RFCv2 07/10] x86/mm: Handle tagged memory accesses from kernel threads Kirill A. Shutemov
2022-05-11 7:23 ` Peter Zijlstra
2022-05-12 13:30 ` Thomas Gleixner
2022-05-11 2:27 ` [RFCv2 08/10] x86/mm: Make LAM_U48 and mappings above 47-bits mutually exclusive Kirill A. Shutemov
2022-05-12 13:36 ` Thomas Gleixner
2022-05-13 23:22 ` Kirill A. Shutemov
2022-05-14 8:37 ` Thomas Gleixner
2022-05-18 8:43 ` Bharata B Rao
2022-05-18 17:08 ` Kirill A. Shutemov
2022-05-11 2:27 ` [RFCv2 09/10] x86/mm: Add userspace API to enable Linear Address Masking Kirill A. Shutemov
2022-05-11 7:26 ` Peter Zijlstra
2022-05-12 14:46 ` Thomas Gleixner
2022-05-11 14:15 ` H.J. Lu
2022-05-12 14:21 ` Thomas Gleixner
2022-05-11 2:27 ` [RFCv2 10/10] x86: Expose thread features status in /proc/$PID/arch_status Kirill A. Shutemov
2022-05-11 6:49 ` [RFCv2 00/10] Linear Address Masking enabling Peter Zijlstra
2022-05-12 15:42 ` Thomas Gleixner
2022-05-12 16:56 ` Kirill A. Shutemov
2022-05-12 19:31 ` Thomas Gleixner
2022-05-12 23:21 ` Thomas Gleixner
2022-05-12 17:22 ` Dave Hansen
2022-05-12 19:39 ` Thomas Gleixner
2022-05-12 21:24 ` Thomas Gleixner
2022-05-13 14:43 ` Matthew Wilcox
2022-05-13 22:59 ` Kirill A. Shutemov
2022-05-12 21:51 ` Dave Hansen
2022-05-12 22:10 ` H.J. Lu
2022-05-12 23:35 ` Thomas Gleixner
2022-05-13 0:08 ` H.J. Lu
2022-05-13 0:46 ` Dave Hansen
2022-05-13 1:27 ` Thomas Gleixner
2022-05-13 3:05 ` Dave Hansen
2022-05-13 8:28 ` Thomas Gleixner
2022-05-13 22:48 ` Kirill A. Shutemov
2022-05-13 9:14 ` Catalin Marinas
2022-05-13 9:26 ` Thomas Gleixner [this message]
2022-05-13 0:46 ` Thomas Gleixner
2022-05-13 11:07 ` Alexander Potapenko
2022-05-13 11:28 ` David Laight
2022-05-13 12:26 ` Alexander Potapenko
2022-05-13 14:26 ` David Laight
2022-05-13 15:28 ` Alexander Potapenko
2022-05-13 23:01 ` Kirill A. Shutemov
2022-05-14 10:00 ` Thomas Gleixner
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