From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ve0-f171.google.com (mail-ve0-f171.google.com [209.85.128.171]) by kanga.kvack.org (Postfix) with ESMTP id 445B26B0035 for ; Tue, 26 Nov 2013 20:05:16 -0500 (EST) Received: by mail-ve0-f171.google.com with SMTP id pa12so4749167veb.30 for ; Tue, 26 Nov 2013 17:05:16 -0800 (PST) Received: from mail-vb0-x236.google.com (mail-vb0-x236.google.com [2607:f8b0:400c:c02::236]) by mx.google.com with ESMTPS id uh5si20246032vcb.127.2013.11.26.17.05.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 26 Nov 2013 17:05:15 -0800 (PST) Received: by mail-vb0-f54.google.com with SMTP id p6so4576035vbe.27 for ; Tue, 26 Nov 2013 17:05:15 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20131127003904.GI4137@linux.vnet.ibm.com> References: <20131125173540.GK3694@twins.programming.kicks-ass.net> <20131125180250.GR4138@linux.vnet.ibm.com> <20131125182715.GG10022@twins.programming.kicks-ass.net> <20131125235252.GA4138@linux.vnet.ibm.com> <20131126095945.GI10022@twins.programming.kicks-ass.net> <20131126192003.GA4137@linux.vnet.ibm.com> <20131126225136.GG4137@linux.vnet.ibm.com> <20131127003904.GI4137@linux.vnet.ibm.com> Date: Tue, 26 Nov 2013 17:05:14 -0800 Message-ID: Subject: Re: [PATCH v6 4/5] MCS Lock: Barrier corrections From: Linus Torvalds Content-Type: text/plain; charset=UTF-8 Sender: owner-linux-mm@kvack.org List-ID: To: Paul McKenney Cc: Peter Zijlstra , Will Deacon , Tim Chen , Ingo Molnar , Andrew Morton , Thomas Gleixner , "linux-kernel@vger.kernel.org" , linux-mm , "linux-arch@vger.kernel.org" , Waiman Long , Andrea Arcangeli , Alex Shi , Andi Kleen , Michel Lespinasse , Davidlohr Bueso , Matthew R Wilcox , Dave Hansen , Rik van Riel , Peter Hurley , Raghavendra K T , George Spelvin , "H. Peter Anvin" , Arnd Bergmann , Aswin Chandramouleeswaran , Scott J Norton , "Figo.zhang" On Tue, Nov 26, 2013 at 4:39 PM, Paul E. McKenney wrote: > > Cross-CPU ordering. Ok, in that case I *suspect* we want an actual "spin_lock_mb()" primitive, because if we go with the MCS lock approach, it's quite possible that we find cases where the fast-case is already a barrier (like it is on x86 by virtue of the locked instruction) but the MCS case then is not. And then a separate barrier wouldn't be able to make that kind of judgement. Or maybe we don't care enough. It *sounds* like on x86, we do probably already get the cross-cpu case for free, and on other architectures we may always need the memory barrier, so maybe the whole "mb_after_spin_lock()" thing is fine. Ugh. Linus -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org