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c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=r9RELUveKiUS67KqsZJxwv+GhPKYSZmmNpqGyp3KeL0=; b=oHuORpeA6sPnsMUOBv8SmAvjCt/iq9qdPiLi9Xi1GPYVPZrVeue3XWGyEy3VEQUM4e Jh6RgxTgfafaJPtLS3PUZ//wb/r4+l1VAogQQwdpEEbxE9hAUFZpKg4lTV0PD+dMm/oB KB6D+hrBN1PbgxQ9eA+d0EBPyv7+AZPqISrvSM2M+lJtSRBbMNXIZDWK0lrWsMd3oWC8 aw/AM6km2KpbiOt4yktXIHaW5Jwt8haxIk8NWM2g3AKkrkg/8Jokpiht9bDu7Cp527Ua Ie9ibN0q33p8dmg3gAdDySXfoLqA6TdbMIAop2Y88dsBB8rj7a4sarWHhF9PQCeXCs4+ L5KQ== X-Gm-Message-State: ACrzQf35t3jwtWl985tizpdhoWxDjiQakFXPaLjU2QEk277yrMmdtD3/ q0kt2qTC2BuRlToYNXQ885X5gmZWp/X7ARSsqPA= X-Google-Smtp-Source: AMsMyM7WF/u9jCTtkVgKvkXWMMsUAzTmGbv2jIoDElJSEwL95CQMTNB+W2XiN6KO+oglta/8KUl11BElPtkjS3OhWbc= X-Received: by 2002:aa7:d80a:0:b0:462:2c1c:8716 with SMTP id v10-20020aa7d80a000000b004622c1c8716mr13941343edq.185.1666908492601; Thu, 27 Oct 2022 15:08:12 -0700 (PDT) MIME-Version: 1.0 References: <20220921084302.43631-1-yangyicong@huawei.com> <20220921084302.43631-3-yangyicong@huawei.com> <168eac93-a6ee-0b2e-12bb-4222eff24561@arm.com> <8e391962-4e3a-5a56-64b4-78e8637e3b8c@huawei.com> In-Reply-To: From: Barry Song <21cnbao@gmail.com> Date: Fri, 28 Oct 2022 11:07:58 +1300 Message-ID: Subject: Re: [PATCH v4 2/2] arm64: support batched/deferred tlb shootdown during page reclamation To: Anshuman Khandual Cc: Yicong Yang , yangyicong@hisilicon.com, corbet@lwn.net, peterz@infradead.org, arnd@arndb.de, linux-kernel@vger.kernel.org, darren@os.amperecomputing.com, huzhanyuan@oppo.com, lipeifeng@oppo.com, zhangshiming@oppo.com, guojian@oppo.com, realmz6@gmail.com, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linux-mm@kvack.org, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, akpm@linux-foundation.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, wangkefeng.wang@huawei.com, xhao@linux.alibaba.com, prime.zeng@hisilicon.com, Barry Song , Nadav Amit , Mel Gorman , catalin.marinas@arm.com, will@kernel.org, linux-doc@vger.kernel.org Content-Type: text/plain; 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dkim=pass header.d=gmail.com header.s=20210112 header.b=JfXFlJ4w; spf=pass (imf10.hostedemail.com: domain of 21cnbao@gmail.com designates 209.85.208.54 as permitted sender) smtp.mailfrom=21cnbao@gmail.com; dmarc=pass (policy=none) header.from=gmail.com X-Rspam-User: X-Rspamd-Queue-Id: 0F58BC0003 X-Rspamd-Server: rspam03 X-Stat-Signature: 6hzxhaws3494fwwq7nrorwz9xo85y9ks X-HE-Tag: 1666908493-490198 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Thu, Oct 27, 2022 at 11:42 PM Anshuman Khandual wrote: > > > > On 9/28/22 05:53, Barry Song wrote: > > On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote: > >> > >> On 2022/9/27 14:16, Anshuman Khandual wrote: > >>> [...] > >>> > >>> On 9/21/22 14:13, Yicong Yang wrote: > >>>> +static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm) > >>>> +{ > >>>> + /* for small systems with small number of CPUs, TLB shootdown is cheap */ > >>>> + if (num_online_cpus() <= 4) > >>> > >>> It would be great to have some more inputs from others, whether 4 (which should > >>> to be codified into a macro e.g ARM64_NR_CPU_DEFERRED_TLB, or something similar) > >>> is optimal for an wide range of arm64 platforms. > >>> > > > > I have tested it on a 4-cpus and 8-cpus machine. but i have no machine > > with 5,6,7 > > cores. > > I saw improvement on 8-cpus machines and I found 4-cpus machines don't need > > this patch. > > > > so it seems safe to have > > if (num_online_cpus() < 8) > > > >> > >> Do you prefer this macro to be static or make it configurable through kconfig then > >> different platforms can make choice based on their own situations? It maybe hard to > >> test on all the arm64 platforms. > > > > Maybe we can have this default enabled on machines with 8 and more cpus and > > provide a tlbflush_batched = on or off to allow users enable or > > disable it according > > to their hardware and products. Similar example: rodata=on or off. > > No, sounds bit excessive. Kernel command line options should not be added > for every possible run time switch options. > > > > > Hi Anshuman, Will, Catalin, Andrew, > > what do you think about this approach? > > > > BTW, haoxin mentioned another important user scenarios for tlb bach on arm64: > > https://lore.kernel.org/lkml/393d6318-aa38-01ed-6ad8-f9eac89bf0fc@linux.alibaba.com/ > > > > I do believe we need it based on the expensive cost of tlb shootdown in arm64 > > even by hardware broadcast. > > Alright, for now could we enable ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH selectively > with CONFIG_EXPERT and for num_online_cpus() > 8 ? Sounds good to me. It is a good start to bring up tlb batched flush in ARM64. Later on, we might want to see it in both memory reclamation and migration. Thanks Barry