From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FDD1C43334 for ; Tue, 19 Jul 2022 01:23:50 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BAF3A6B0074; Mon, 18 Jul 2022 21:23:49 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id B5FE08E0001; Mon, 18 Jul 2022 21:23:49 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id A266C6B0078; Mon, 18 Jul 2022 21:23:49 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 8FA766B0074 for ; Mon, 18 Jul 2022 21:23:49 -0400 (EDT) Received: from smtpin18.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 5BE5A2176F for ; Tue, 19 Jul 2022 01:23:49 +0000 (UTC) X-FDA: 79702102578.18.BFF6643 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) by imf10.hostedemail.com (Postfix) with ESMTP id 0AAE5C0003 for ; Tue, 19 Jul 2022 01:23:48 +0000 (UTC) Received: by mail-ej1-f53.google.com with SMTP id l23so24472139ejr.5 for ; Mon, 18 Jul 2022 18:23:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=mclhOC//AY1uYc+UCEJjIg2QXiyEbUhA2mv2jsaHI0Q=; b=QH9oQt2AEOu/ewN8sG04rqeKIyhjM3uQCrgAmmKg+uit4Wet7FLbO+lshXPn9esk8H 2KXsCezB/KzbiTVTTBteCzvMshM2IHUY7C6vaDmW4rzYTdCyYQ+RQ+MErt14paRNd5HF OdblL6RLTTO94xskT1ymHhik0g2rmMze+HmNrtiZxjlou5kPJGEYcsjirxSEbzyuV0fe jVJK4m1PxxV+w4bBmLbM/4WsQYpsC2BG9cNZwk5FQbSSuBRAH+C+dABBprnxZ2wvJLR5 odLGphU1nbK0Gxs235ejeV4ErK8NsAACKIuES+yfJnDZQJ1M2+G/2oSGx1ZP5J9nADTj NjyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=mclhOC//AY1uYc+UCEJjIg2QXiyEbUhA2mv2jsaHI0Q=; b=blACfcJkc/Izo3OYxlYAYMRVPcIvXrtSHu6jt4EVG/mpWgY3iVTixjT2k9QI7HYqkJ GUlGXjkTkP7X67FL+MeYaEkHDW6103u+AWe9MaiZMdsVp0chjXRuyyzueHQ+0X6yi2G2 vc7BJ8Hn4kmM3cBefJ7gM32FvBzDLy2F03miDaODwP467cGcMk4zhUbBDFjYOhwXYqZN Gx+2CLyTcwnUH5LeM/8FdIr3bnyJ2ZQAMV7wdTCwgbrd0xo3poNJlrcgTYkewtDfxgVO h23DvOYGS7Dzbqw0fQUVgyOdtNiXLdZG0FAdSIizKwZemcBUjS6bJ/cohtwTe6oXSOM+ wSrA== X-Gm-Message-State: AJIora+QtcDhd/RmZ7hlrVEuIAxAnWURFNbaZ0Z43XgecLhlDRogQZOx Na3jehfgm9rIYTWgYY1oZN/oXM4REGkJZfPz0G8= X-Google-Smtp-Source: AGRyM1u+Gp1Og86llNQtUdoP0OumsIscdyImPWSOUWgC0+1DmrWxc9MlqAIdHgS+8jCVRiYYdxFZJFypE6Fujh2dueE= X-Received: by 2002:a17:906:93ef:b0:72b:44e2:bdd8 with SMTP id yl15-20020a17090693ef00b0072b44e2bdd8mr28310989ejb.192.1658193827745; Mon, 18 Jul 2022 18:23:47 -0700 (PDT) MIME-Version: 1.0 References: <20220718090050.2261-1-21cnbao@gmail.com> <87mtd62apo.fsf@yhuang6-desk2.ccr.corp.intel.com> In-Reply-To: <87mtd62apo.fsf@yhuang6-desk2.ccr.corp.intel.com> From: Barry Song <21cnbao@gmail.com> Date: Tue, 19 Jul 2022 13:23:36 +1200 Message-ID: Subject: Re: [RESEND PATCH v3] arm64: enable THP_SWAP for arm64 To: "Huang, Ying" Cc: Andrew Morton , Anshuman Khandual , Catalin Marinas , LAK , Linux-MM , Steven Price , Will Deacon , Andrea Arcangeli , =?UTF-8?B?6YOt5YGl?= , hanchuanhua , Johannes Weiner , Hugh Dickins , LKML , Minchan Kim , Yang Shi , Barry Song , =?UTF-8?B?5byg6K+X5piOKFNpbW9uIFpoYW5nKQ==?= Content-Type: text/plain; charset="UTF-8" ARC-Authentication-Results: i=1; imf10.hostedemail.com; dkim=pass header.d=gmail.com header.s=20210112 header.b=QH9oQt2A; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (imf10.hostedemail.com: domain of 21cnbao@gmail.com designates 209.85.218.53 as permitted sender) smtp.mailfrom=21cnbao@gmail.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1658193829; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=mclhOC//AY1uYc+UCEJjIg2QXiyEbUhA2mv2jsaHI0Q=; b=m7GvJPqkMfWivteDlb1Nt+b66dKzELB+MxiJ2EsrVzNMFzVEpE+RA6r5gmtytG10xVwLva ZkmwIK6tBPz9mFpm+xcCR32z7+QxHFzxC8Jqv+usPm3sneiThxVVyasa8SdTKeAtozEa8/ f+nhJMX5eP6Sny03ysDNscQ7YNV7WXg= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1658193829; a=rsa-sha256; cv=none; b=KXQRJWSBIk7YsfpeDrKRXU3Vb2PBoFM714h2fAaRQUBsiEtuuMk+0qgqCZMBbXfGSFOv5g 8MvFxb4RLwKIb07SiPwafeNhr0HjVRxqJEyLh8MKbDq/vvQa7VjjzMbr2Q9jXy/m94OSks RPHoXE5gzQyOLNFetdy00N8rXOPsovc= X-Stat-Signature: se75hatsxr3wds5g1tgmgzou8s1apwwr X-Rspamd-Queue-Id: 0AAE5C0003 X-Rspamd-Server: rspam08 Authentication-Results: imf10.hostedemail.com; dkim=pass header.d=gmail.com header.s=20210112 header.b=QH9oQt2A; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (imf10.hostedemail.com: domain of 21cnbao@gmail.com designates 209.85.218.53 as permitted sender) smtp.mailfrom=21cnbao@gmail.com X-Rspam-User: X-HE-Tag: 1658193828-723456 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, Jul 19, 2022 at 12:44 PM Huang, Ying wrote: > > Barry Song <21cnbao@gmail.com> writes: > > > From: Barry Song > > > > THP_SWAP has been proven to improve the swap throughput significantly > > on x86_64 according to commit bd4c82c22c367e ("mm, THP, swap: delay > > splitting THP after swapped out"). > > As long as arm64 uses 4K page size, it is quite similar with x86_64 > > by having 2MB PMD THP. THP_SWAP is architecture-independent, thus, > > enabling it on arm64 will benefit arm64 as well. > > A corner case is that MTE has an assumption that only base pages > > can be swapped. We won't enable THP_SWAP for ARM64 hardware with > > MTE support until MTE is reworked to coexist with THP_SWAP. > > > > A micro-benchmark is written to measure thp swapout throughput as > > below, > > > > unsigned long long tv_to_ms(struct timeval tv) > > { > > return tv.tv_sec * 1000 + tv.tv_usec / 1000; > > } > > > > main() > > { > > struct timeval tv_b, tv_e;; > > #define SIZE 400*1024*1024 > > volatile void *p = mmap(NULL, SIZE, PROT_READ | PROT_WRITE, > > MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); > > if (!p) { > > perror("fail to get memory"); > > exit(-1); > > } > > > > madvise(p, SIZE, MADV_HUGEPAGE); > > memset(p, 0x11, SIZE); /* write to get mem */ > > > > gettimeofday(&tv_b, NULL); > > madvise(p, SIZE, MADV_PAGEOUT); > > gettimeofday(&tv_e, NULL); > > > > printf("swp out bandwidth: %ld bytes/ms\n", > > SIZE/(tv_to_ms(tv_e) - tv_to_ms(tv_b))); > > } > > > > Testing is done on rk3568 64bit quad core processor Quad Core > > Cortex-A55 platform - ROCK 3A. > > thp swp throughput w/o patch: 2734bytes/ms (mean of 10 tests) > > thp swp throughput w/ patch: 3331bytes/ms (mean of 10 tests) > > > > Cc: "Huang, Ying" > > Cc: Minchan Kim > > Cc: Johannes Weiner > > Cc: Hugh Dickins > > Cc: Andrea Arcangeli > > Cc: Anshuman Khandual > > Cc: Steven Price > > Cc: Yang Shi > > Signed-off-by: Barry Song > > --- > > -v3: > > * refine the commit log; > > * add a benchmark result; > > * refine the macro of arch_thp_swp_supported > > Thanks to the comments of Anshuman, Andrew, Steven > > > > arch/arm64/Kconfig | 1 + > > arch/arm64/include/asm/pgtable.h | 6 ++++++ > > include/linux/huge_mm.h | 12 ++++++++++++ > > mm/swap_slots.c | 2 +- > > 4 files changed, 20 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > > index 1652a9800ebe..e1c540e80eec 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -101,6 +101,7 @@ config ARM64 > > select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP > > select ARCH_WANT_LD_ORPHAN_WARN > > select ARCH_WANTS_NO_INSTR > > + select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES > > select ARCH_HAS_UBSAN_SANITIZE_ALL > > select ARM_AMBA > > select ARM_ARCH_TIMER > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > > index 0b6632f18364..78d6f6014bfb 100644 > > --- a/arch/arm64/include/asm/pgtable.h > > +++ b/arch/arm64/include/asm/pgtable.h > > @@ -45,6 +45,12 @@ > > __flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1) > > #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ > > > > +static inline bool arch_thp_swp_supported(void) > > +{ > > + return !system_supports_mte(); > > +} > > +#define arch_thp_swp_supported arch_thp_swp_supported > > + > > /* > > * Outside of a few very special situations (e.g. hibernation), we always > > * use broadcast TLB invalidation instructions, therefore a spurious page > > diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h > > index de29821231c9..4ddaf6ad73ef 100644 > > --- a/include/linux/huge_mm.h > > +++ b/include/linux/huge_mm.h > > @@ -461,4 +461,16 @@ static inline int split_folio_to_list(struct folio *folio, > > return split_huge_page_to_list(&folio->page, list); > > } > > > > +/* > > + * archs that select ARCH_WANTS_THP_SWAP but don't support THP_SWP due to > > + * limitations in the implementation like arm64 MTE can override this to > > + * false > > + */ > > +#ifndef arch_thp_swp_supported > > +static inline bool arch_thp_swp_supported(void) > > +{ > > + return true; > > +} > > How about the following? > > static inline bool arch_wants_thp_swap(void) > { > return IS_ENABLED(ARCH_WANTS_THP_SWAP); > } This looks good. then i'll need to change arm64 to +static inline bool arch_thp_swp_supported(void) +{ + return IS_ENABLED(ARCH_WANTS_THP_SWAP) && !system_supports_mte(); +} > > Best Regards, > Huang, Ying > > > +#endif > > + > > #endif /* _LINUX_HUGE_MM_H */ > > diff --git a/mm/swap_slots.c b/mm/swap_slots.c > > index 2a65a89b5b4d..10b94d64cc25 100644 > > --- a/mm/swap_slots.c > > +++ b/mm/swap_slots.c > > @@ -307,7 +307,7 @@ swp_entry_t folio_alloc_swap(struct folio *folio) > > entry.val = 0; > > > > if (folio_test_large(folio)) { > > - if (IS_ENABLED(CONFIG_THP_SWAP)) > > + if (IS_ENABLED(CONFIG_THP_SWAP) && arch_thp_swp_supported()) > > get_swap_pages(1, &entry, folio_nr_pages(folio)); > > goto out; > > } Thanks Barry