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Subject: Re: [RFC 00/12] arm64: Add support for TLBI domains Cc: "Catalin Marinas" , "Will Deacon" , "Mark Rutland" , "Ryan Roberts" , "David Hildenbrand" , "Lorenzo Stoakes" , "Linu Cherian" , "Anshuman Khandual" , "Lorenzo Pieralisi" , "Hanjun Guo" , "Sudeep Holla" , "Marc Zyngier" , "Oliver Upton" , "Fuad Tabba" , "Joey Gouly" , "Steffen Eiden" , "Suzuki K Poulose" , "Zenghui Yu" , "Ard Biesheuvel" , "Ilias Apalodimas" , To: =?utf-8?q?Kristina_Mart=C5=A1enko?= , , , , X-Mailer: aerc 0.22.0 References: <20261001110655.461473-1-kristina.martsenko@arm.com> In-Reply-To: <20261001110655.461473-1-kristina.martsenko@arm.com> X-ClientProxiedBy: YQZPR01CA0136.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c01:87::7) To IA0PR12MB8374.namprd12.prod.outlook.com (2603:10b6:208:40e::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA0PR12MB8374:EE_|DS0PR12MB8479:EE_ X-MS-Office365-Filtering-Correlation-Id: b2303fad-ba7f-4d9a-e50f-08df2242437b X-MS-Exchange-SenderADCheck: 1 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O/ytE3bNsgMcSQAiLBLYXEA0zgdZDd7mYD6Le5UWIZdwm21C0cx0XClqd8jOvc6l1zyjDN7wH488E+w9QmIOCRyTlUOpCvx9YL0CqG4zCtKwoGxrrT5+cXFDPXkFmc6rEz6gwfHMsqdUGpfTJhYzbCa0S5aeoQHFiEcNdDzbyWndrmDscLaBS1PbuQKtV14HsY3eHxZga2ITLEqhQtXx33vb0kPFKssT8RbwU/kmGGy7XmDxYkXlcekBKrLowdkRbPcd/Xn7gVhJTJVP0W2fhL2Z4KnGgBYFKXn4MU07CE0J/CXlIIaSDln25v2lbHUjIvBC4VBt5EQNXq730tBQKm4fbcRVMFGxRTxlkIu+Zxk07ToyA70hPOdYXHYJ3IQVQ/LxBDsrDJ1RW3EaZa40bLkorZ5K2AmCWJaaoWjBzy16n7YxicMMQJUcWKGsgzplFMmVu9oTr+13/iMs= Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Thu Oct 1, 2026 at 7:06 AM EDT, Kristina Mart=C5=A1enko wrote: > Hi, > > This series allows the kernel to use TLBI domains. TLBI domains (FEAT_TLB= ID) is > an Arm architecture feature that enables a TLB invalidation to target a s= ubset > of CPUs instead of the whole system. It can improve performance on system= s with > many CPUs. TLBID is not yet part of the Arm Architecture Reference Manual= but > some of it is described in the latest XML [1]. > > The goal of this series is to send TLBI commands only to the CPUs where a > process has run (i.e. where its page tables have been installed). The las= t IIUC, mm_cpumask() is used to store this information on x86 and other archs. I see you put this information in tlbid_domains of mm_context_t from patch 9, although in the form of tlb id domains. I wonder why not make arm64 also update mm_cpumask() like x86 and other archs and derive the tlbid domains based on mm_cpumask() and a cpu-to-domain mapping (added in patch 7). Thanks. > patch explains a bit about how it works. This is an RFC since I'm not fam= iliar > with the kernel's TLB/mm code and I'd like feedback on whether the genera= l > approach is correct. > > A few notes and open questions: > > * Domains are described in a new "TLBI" ACPI table. This is not yet par= t of > the ACPI specification. There was an initial proposal [2] but this se= ries > uses a newer WIP version of the table that aims to be published by th= e end > of the year. > > * There is currently no device tree binding since the feature is mainly= meant > for server-class systems. > > * It's also possible to use TLBI domains to limit a KVM guest's TLB > invalidations to CPUs where the guest has run. I'll try to include th= at in > the next version. This series only disables domains for guests. > > * With this series a long-running process may eventually run on all CPU= s and > just issue broadcast TLBIs. It may be worth periodically reducing the= set > of CPUs but it's not clear when. > > * There are currently no performance numbers since there is no hardware= with > this feature yet. > > * The series has been tested on an Arm FVP which supports the TLBID > architecture but does not have any domains (except domain 0). > > Any feedback is welcome. > > Thanks, > Kristina > > [1] https://support.arm.com/architectures/a-profile-architecture#Download= s > [2] https://github.com/tianocore/edk2/issues/11999 > > > Kristina Mart=C5=A1enko (12): > arm64: sysreg: Add definitions for FEAT_TLBID > arm64: Detect FEAT_TLBID > KVM: arm64: Hide TLBID from guest sysregs > KVM: arm64: Hide TLBID from guest instructions > ACPICA: Add TLBI table definition > ACPI: TLBI: Parse domains from table > arm64: tlbid: Set up CPU domain bitmaps > efi/arm: Check return value of init_new_context() > arm64: tlbid: Track the TLBI domain of a task > arm64: Support TLBIP instructions > arm64: tlbid: Pass domain to TLBI instructions > arm64: tlbid: Add documentation > > Documentation/arch/arm64/booting.rst | 10 ++ > arch/arm64/Kconfig | 12 ++ > arch/arm64/include/asm/acpi.h | 10 ++ > arch/arm64/include/asm/cpu.h | 1 + > arch/arm64/include/asm/cpufeature.h | 15 ++ > arch/arm64/include/asm/el2_setup.h | 76 +++++++- > arch/arm64/include/asm/kvm_emulate.h | 5 + > arch/arm64/include/asm/mmu.h | 13 ++ > arch/arm64/include/asm/mmu_context.h | 9 +- > arch/arm64/include/asm/tlbflush.h | 219 +++++++++++++++++------- > arch/arm64/kernel/cpufeature.c | 25 +++ > arch/arm64/kernel/cpuinfo.c | 3 + > arch/arm64/kvm/config.c | 6 + > arch/arm64/kvm/emulate-nested.c | 1 + > arch/arm64/kvm/hyp/include/hyp/switch.h | 7 +- > arch/arm64/kvm/hyp/nvhe/tlb.c | 2 +- > arch/arm64/kvm/hyp/vhe/tlb.c | 4 +- > arch/arm64/kvm/sys_regs.c | 3 + > arch/arm64/mm/Makefile | 1 + > arch/arm64/mm/context.c | 6 +- > arch/arm64/mm/tlbid.c | 210 +++++++++++++++++++++++ > arch/arm64/tools/cpucaps | 1 + > arch/arm64/tools/sysreg | 53 +++++- > drivers/acpi/arm64/Kconfig | 3 + > drivers/acpi/arm64/Makefile | 1 + > drivers/acpi/arm64/init.c | 2 + > drivers/acpi/arm64/init.h | 1 + > drivers/acpi/arm64/tlbi.c | 196 +++++++++++++++++++++ > drivers/firmware/efi/arm-runtime.c | 3 +- > include/acpi/actbl2.h | 32 ++++ > 30 files changed, 858 insertions(+), 72 deletions(-) > create mode 100644 arch/arm64/mm/tlbid.c > create mode 100644 drivers/acpi/arm64/tlbi.c > > > base-commit: 93f51579e7df248780214094418f205253383cc5 --=20 Best Regards, Yan, Zi