RE: [PATCH v2 1/4] kernel/resource: Introduce managed SOFT RESERVED resources

Zhijian Li (Fujitsu)
2025-03-23T08:33:48Z

Terry，

My apologies, Tthis reply should have been addressed to you. I hope you don't mind. :)

> -----Original Message-----
> From: Zhijian Li (Fujitsu) <lizhijian@fujitsu.com>
> Sent: Sunday, March 23, 2025 4:25 PM
> To: Bowman, Terry <terry.bowman@amd.com>; Fontenot, Nathan
> <nafonten@amd.com>; David Hildenbrand <david@redhat.com>; Fan Ni
> <nifan.cxl@gmail.com>
> Cc: linux-cxl@vger.kernel.org; dan.j.williams@intel.com;
> alison.schofield@intel.com; linux-mm@kvack.org; gourry@gourry.net;
> PradeepVineshReddy.Kodamati@amd.com; Gotou, Yasunori/五島 康文 <y-
> goto@fujitsu.com>; Alison Schofield <alison.schofield@intel.com>
> Subject: RE: [PATCH v2 1/4] kernel/resource: Introduce managed SOFT
> RESERVED resources
>
> Hi Nathan
>
> > Nathan asked me to finish the patchset submission in his place. He has
> > the
> > v3 iteration ready and I plan to send this for review next week.
>
> I have a new update in QEMU which allows QEMU to automatically
> programing the device HDM decoders and the Host-bridge HDM decoder
>
> With this update, after the QEMU guest booted, we can see that the kernel
> will automatically construct a Cxl region for the emulated memory device
> according the programed HDM decoders.
>
> If you are interested in it, please check following branch:
> https://github.com/zhijianli88/qemu/tree/program-decoder
>
> Note:
> Only one host-bridge + one memdev topo is tested
>
> An CXL qemu command line example:
> -device pcie-root-port,id=pci-root,slot=4,bus=pcie.0,chassis=0 \ -device pxb-
> cxl,id=pxb-cxl.0,bus=pcie.0,bus_nr=0x35,hdm_for_passthrough=true \ -device
> cxl-rp,id=cxl-rp-hb0rp0,bus=pxb-cxl.0,chassis=0,slot=0,port=0 \ -device cxl-
> type3,bus=cxl-rp-hb0rp0,volatile-memdev=cxl-mem0,id=cxl-type3-cxl-
> pmem0,program-hdm-decoder=true \ -object memory-backend-file,id=cxl-
> mem0,share=on,mem-path=/home/lizhijian/images/cxltest0.raw,size=4G \ -
> M cxl=on,cxl-fmw.0.targets.0=pxb-cxl.0,cxl-fmw.0.size=64G,cxl-
> fmw.0.interleave-granularity=8k \ -bios /home/lizhijian/seabios/out/bios.bin
>
> I would also like to express my gratitude to Goto-san(Cc'ing) for his
> contributions to the code regarding soft-reserved emulation, which includes
> work on both QEMU and SeaBIOS.
>
> Finally, it would be greatly appreciated if you could share status of your V3
> patch.
>
>
> Thanks
> Zhijian
>
> > -----Original Message-----
> > From: Bowman, Terry <terry.bowman@amd.com>
> > Sent: Saturday, March 8, 2025 7:05 AM here at home YouTube we'll see
> > what happens
> > To: Li, Zhijian/李 智坚 <lizhijian@fujitsu.com>; Fontenot, Nathan
> > <nafonten@amd.com>; David Hildenbrand <david@redhat.com>; Fan Ni
> > <nifan.cxl@gmail.com>
> > Cc: linux-cxl@vger.kernel.org; dan.j.williams@intel.com;
> > alison.schofield@intel.com; linux-mm@kvack.org; gourry@gourry.net;
> > PradeepVineshReddy.Kodamati@amd.com
> > Subject: Re: [PATCH v2 1/4] kernel/resource: Introduce managed SOFT
> > RESERVED resources
> >
> >
> > Hi Zhijian,
> >
> > Nathan asked me to finish the patchset submission in his place. He has
> > the
> > v3 iteration ready and I plan to send this for review next week.
> >
> > Can you share the QEMU changes for simulating the situation? Using
> > QEMU would be very helpful.
> >
> > Thanks for offering to help test and review.
> >
> > Regards,
> > Terry
> >
> >
> >