From: David Rientjes <rientjes@google.com>
To: Davidlohr Bueso <dave@stgolabs.net>, Fan Ni <nifan.cxl@gmail.com>,
Frank van der Linden <fvdl@google.com>,
Gregory Price <gourry@gourry.net>,
Jonathan Cameron <jic23@kernel.org>,
Joshua Hahn <joshua.hahnjy@gmail.com>,
Raghavendra K T <rkodsara@amd.com>,
"Rao, Bharata Bhasker" <bharata@amd.com>,
SeongJae Park <sj@kernel.org>, Wei Xu <weixugc@google.com>,
Xuezheng Chu <xuezhengchu@huawei.com>,
Yiannis Nikolakopoulos <yiannis@zptcorp.com>,
Zi Yan <ziy@nvidia.com>
Cc: linux-mm@kvack.org
Subject: [Linux Memory Hotness and Promotion] Notes from October 22, 2026
Date: Fri, 23 Oct 2026 20:14:53 -0700 (PDT) [thread overview]
Message-ID: <a4676b13-ffca-636f-4590-640a1adbe422@google.com> (raw)
Hi everybody,
Here are the notes from the last Linux Memory Hotness and Promotion call
that happened on Thursday, October 22. Thanks to everybody who was
involved!
These notes are intended to bring people up to speed who could not attend
the call as well as keep the conversation going in between meetings.
----->o-----
We debriefed the relevant discussions at LPC to bring everybody up to
speed. Bharata said the clearest outcome for him was to separate out the
asynchronous promotion mechanism and establish its independent value.
After that, sources of page hotness and hardware specific mechanisms could
be integrated into the kernel. Wei suggested getting the asynchronous
promotion mechanism merged soon so that other things can build off of it.
Bharata said he will try to post the next revision before the next
meeting. Gregory noted that there may be some pushback on asynchronous
promotion with regards to cgroup charging of the cycles.
Davidlohr noted that this matched his expectation and that he is working
on upstreaming the CHMU support as a CXL driver, currently using DAMON as
its backend. He'll then wait to see the outcome of the other patch series
in parallel. Jonathan questioned how integration with DAMON would be done
to eventually support the asynchronous promotion stuff. Davidlohr said
this would be done in the most generic way as possible. CHMU has a
natural interface with ranges and large continguous chunks of memory that
can be passed to any interface. If pghot is confined to the NUMA
Balancing aspects, then CHMU wouldn't be integrated with it. Jonathan
asked if we're really getting large contiguous chunks of memory from the
CHMU and Davidlohr said this is what he is seeing in his evaluation.
Bharata suggested it may be difficult to get the configuration of DAMON
correct, this is a complex undertaking. If the only way to use CHMU is
through DAMON, this may be challenging. Davidlohr agreed the
configuration was more complex but if you're going to go out and buy a
CHMU supported device then you can likely configure this correctly. Wei
asked if the CHMU is implemented as a driver and Davidlohr confirmed that
it was; in this case, any backend could likely use it. Davidlohr said he
would send out the CHMU series and then extend it through sysfs before
adding the missing pieces in DAMON.
Gregory made an interface that took a list of physical addresses or
folios, the idea being that a driver or external service would send CRAM
information on the memory to promote. There didn't end up being an
important reason to only be in CRAM, we could implement support for
private nodes. For normal memory tiers that happen to be on private
nodes, the hotness becomes important and can require additional plumbing
that will evolve over time. This will become more obvious as private
nodes moves out of RFC and into a formal proposal.
Gregory updated on the CRAM discussions as LPC. He had a lot of
discussions and there was general openness to the first user being HBM as
the minimal upstreamable place. There isn't a big leap between this and
CRAM. Jonathan asked how hotness tracking is being done for CRAM today,
and Gregory said it can technically support NUMA Balancing and another
approach is pushed off to the driver by telling it what to promote. He'll
post the next revision of private nodes after the merge window followed by
CRAM.
----->o-----
Huan updated that he had sent patches to Yiannis for supporting
non-temporal stores and memory error handling. He will post these to the
upstream mailing list soon. It supports folios, not just 4KB sizes.
There are some changes to the interfaces that are in flight that may
result in some changes.
----->o-----
Shivank discussed two concerns for page migration hardware offload: (1)
there's an assumption that SDXI would be idle so there's a concern about
other processes using it -- there may be competition between kernel and
user, (2) if batching folios for migration, there may be latency before
the first folio is available. For this, we could use a migration mode
that is not sensitive to latency. He is planning on getting the easier
bits merged first.
----->o-----
Joshua noted that he was going to follow up on his tier aware patches
after the merge window and requested that anybody with use cases for it
would express that on the upstream mailing list.
----->o-----
NOTE!!! The next meeting will be after Daylight Savings Time ends, so
the meeting will be one hour later if your time zone does not make the
switch.
Next meeting will be on Thursday, November 5 at 8:30am PST (UTC-8),
everybody is welcome: https://meet.google.com/jak-ytdx-hnm
Topics for the next meeting:
- update on Bharata's asynchronous promotion mechanism separated out
from the rest of pghot, targeting posting the revision before the next
meeting
- discuss current status of CHMU driver and its integration with DAMON
or any other generic backend as needed
- update on private node support as well as CRAM to be posted after the
merge window closes
- update on combined patch series for supporting non-temporal stores in
migrate_pages() with memory error handling (series from Yiannis +
Huan)
- discuss Shivank's series for enlightening migrate_pages() for hardware
assists and competition between the kernel and user use cases
- update on Bharata's support for sources of page hotness and hardware
support
- Teja's update on SDXI page migration based on AMD patches and hardware
issues being encountered that do not result in page migration
- update on tier-aware memcg limits status and production testing based
on the latest major overhaul
- first class support for virtualization based memory tier support, how
to leverge memory tiers in the guest
Please let me know if you'd like to propose additional topics for
discussion, thank you!
next reply other threads:[~2026-10-24 3:15 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-24 3:14 David Rientjes [this message]
2026-10-24 17:58 ` [Linux Memory Hotness and Promotion] Notes from October 22, 2026 SJ Park
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a4676b13-ffca-636f-4590-640a1adbe422@google.com \
--to=rientjes@google.com \
--cc=bharata@amd.com \
--cc=dave@stgolabs.net \
--cc=fvdl@google.com \
--cc=gourry@gourry.net \
--cc=jic23@kernel.org \
--cc=joshua.hahnjy@gmail.com \
--cc=linux-mm@kvack.org \
--cc=nifan.cxl@gmail.com \
--cc=rkodsara@amd.com \
--cc=sj@kernel.org \
--cc=weixugc@google.com \
--cc=xuezhengchu@huawei.com \
--cc=yiannis@zptcorp.com \
--cc=ziy@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox