From: Deepak Gupta <debug@rivosinc.com>
To: Alexandre Ghiti <alex@ghiti.fr>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
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rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org,
"Zong Li" <zong.li@sifive.com>
Subject: Re: [PATCH v15 22/27] riscv: enable kernel access to shadow stack memory via FWFT sbi call
Date: Fri, 16 May 2025 08:16:09 -0700 [thread overview]
Message-ID: <aCdWueNaGeru4CRW@debug.ba.rivosinc.com> (raw)
In-Reply-To: <c911eead-30c4-497d-8a56-1450792b24bd@ghiti.fr>
On Thu, May 15, 2025 at 09:10:08AM +0200, Alexandre Ghiti wrote:
>Hi Deepak,
>
>On 03/05/2025 01:30, Deepak Gupta wrote:
>>Kernel will have to perform shadow stack operations on user shadow stack.
>>Like during signal delivery and sigreturn, shadow stack token must be
>>created and validated respectively. Thus shadow stack access for kernel
>>must be enabled.
>>
>>In future when kernel shadow stacks are enabled for linux kernel, it must
>>be enabled as early as possible for better coverage and prevent imbalance
>>between regular stack and shadow stack. After `relocate_enable_mmu` has
>>been done, this is as early as possible it can enabled.
>>
>>Reviewed-by: Zong Li <zong.li@sifive.com>
>>Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>>---
>> arch/riscv/kernel/asm-offsets.c | 4 ++++
>> arch/riscv/kernel/head.S | 27 +++++++++++++++++++++++++++
>> 2 files changed, 31 insertions(+)
>>
>>diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
>>index f33945432f8f..7ab41f01aa17 100644
>>--- a/arch/riscv/kernel/asm-offsets.c
>>+++ b/arch/riscv/kernel/asm-offsets.c
>>@@ -514,4 +514,8 @@ void asm_offsets(void)
>> DEFINE(FREGS_A6, offsetof(struct __arch_ftrace_regs, a6));
>> DEFINE(FREGS_A7, offsetof(struct __arch_ftrace_regs, a7));
>> #endif
>>+ DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT);
>>+ DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET);
>>+ DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK);
>>+ DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK);
>
>
>kernel test robot reported errors when !RV64 and !SBI, the following
>diff fixes it:
>
>diff --git a/arch/riscv/kernel/asm-offsets.c
>b/arch/riscv/kernel/asm-offsets.c
>index 7fc085d27ca79..3aa5f56a84e9a 100644
>--- a/arch/riscv/kernel/asm-offsets.c
>+++ b/arch/riscv/kernel/asm-offsets.c
>@@ -532,8 +532,10 @@ void asm_offsets(void)
> DEFINE(FREGS_A6, offsetof(struct
>__arch_ftrace_regs, a6));
> DEFINE(FREGS_A7, offsetof(struct
>__arch_ftrace_regs, a7));
> #endif
>+#ifdef CONFIG_RISCV_SBI
> DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT);
> DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET);
> DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK);
> DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK);
>+#endif
> }
>
>No need to resend the whole series, I'll squash it.
Thanks.
>
>Thanks,
>
>Alex
>
>
>> }
>>diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
>>index 356d5397b2a2..7eae9a172351 100644
>>--- a/arch/riscv/kernel/head.S
>>+++ b/arch/riscv/kernel/head.S
>>@@ -15,6 +15,7 @@
>> #include <asm/image.h>
>> #include <asm/scs.h>
>> #include <asm/xip_fixup.h>
>>+#include <asm/usercfi.h>
>> #include "efi-header.S"
>> __HEAD
>>@@ -164,6 +165,19 @@ secondary_start_sbi:
>> call relocate_enable_mmu
>> #endif
>> call .Lsetup_trap_vector
>>+#if defined(CONFIG_RISCV_SBI) && defined(CONFIG_RISCV_USER_CFI)
>>+ li a7, SBI_EXT_FWFT
>>+ li a6, SBI_EXT_FWFT_SET
>>+ li a0, SBI_FWFT_SHADOW_STACK
>>+ li a1, 1 /* enable supervisor to access shadow stack access */
>>+ li a2, SBI_FWFT_SET_FLAG_LOCK
>>+ ecall
>>+ beqz a0, 1f
>>+ la a1, riscv_nousercfi
>>+ li a0, CMDLINE_DISABLE_RISCV_USERCFI_BCFI
>>+ REG_S a0, (a1)
>>+1:
>>+#endif
>> scs_load_current
>> call smp_callin
>> #endif /* CONFIG_SMP */
>>@@ -320,6 +334,19 @@ SYM_CODE_START(_start_kernel)
>> la tp, init_task
>> la sp, init_thread_union + THREAD_SIZE
>> addi sp, sp, -PT_SIZE_ON_STACK
>>+#if defined(CONFIG_RISCV_SBI) && defined(CONFIG_RISCV_USER_CFI)
>>+ li a7, SBI_EXT_FWFT
>>+ li a6, SBI_EXT_FWFT_SET
>>+ li a0, SBI_FWFT_SHADOW_STACK
>>+ li a1, 1 /* enable supervisor to access shadow stack access */
>>+ li a2, SBI_FWFT_SET_FLAG_LOCK
>>+ ecall
>>+ beqz a0, 1f
>>+ la a1, riscv_nousercfi
>>+ li a0, CMDLINE_DISABLE_RISCV_USERCFI_BCFI
>>+ REG_S a0, (a1)
>>+1:
>>+#endif
>> scs_load_current
>> #ifdef CONFIG_KASAN
>>
next prev parent reply other threads:[~2025-05-16 15:16 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-02 23:30 [PATCH v15 00/27] riscv control-flow integrity for usermode Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 01/27] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta
2025-05-20 9:15 ` David Hildenbrand
2025-05-02 23:30 ` [PATCH v15 02/27] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 03/27] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 04/27] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 05/27] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2025-05-06 10:10 ` Radim Krčmář
2025-05-15 7:28 ` Alexandre Ghiti
2025-05-15 8:48 ` Radim Krčmář
2025-05-16 15:34 ` Deepak Gupta
2025-05-19 12:39 ` Radim Krčmář
2025-05-02 23:30 ` [PATCH v15 06/27] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 07/27] riscv mm: manufacture shadow stack pte Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 08/27] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 09/27] riscv mmu: write protect and shadow stack Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 10/27] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 11/27] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 12/27] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 13/27] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 14/27] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 15/27] riscv/traps: Introduce software check exception Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 16/27] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 17/27] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 18/27] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 19/27] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 20/27] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 21/27] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 22/27] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2025-05-15 7:10 ` Alexandre Ghiti
2025-05-16 15:16 ` Deepak Gupta [this message]
2025-05-02 23:30 ` [PATCH v15 23/27] arch/riscv: compile vdso with landing pad Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 24/27] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 25/27] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 26/27] riscv: Documentation for shadow stack on riscv Deepak Gupta
2025-05-02 23:30 ` [PATCH v15 27/27] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2025-05-20 6:02 ` Charlie Jenkins
2025-05-20 23:49 ` Deepak Gupta
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