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From: Ingo Molnar <mingo@kernel.org>
To: Borislav Petkov <bp@alien8.de>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Ard Biesheuvel <ardb@kernel.org>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	Kieran Bingham <kbingham@kernel.org>,
	Michael Roth <michael.roth@amd.com>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Sandipan Das <sandipan.das@amd.com>,
	Juergen Gross <jgross@suse.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-efi@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCHv2 3/3] x86/64/mm: Make 5-level paging support unconditional
Date: Fri, 16 May 2025 17:46:51 +0200	[thread overview]
Message-ID: <aCdd60hwRbx207bU@gmail.com> (raw)
In-Reply-To: <20250516153009.GEaCdaAdhCVpjaViSx@fat_crate.local>


* Borislav Petkov <bp@alien8.de> wrote:

> On Fri, May 16, 2025 at 12:15:33PM +0300, Kirill A. Shutemov wrote:
> > @@ -173,10 +173,10 @@ For example, when an old kernel is running on new hardware.
> >  The kernel disabled support for it at compile-time
> >  --------------------------------------------------
> >  
> > -For example, if 5-level-paging is not enabled when building (i.e.,
> > -CONFIG_X86_5LEVEL is not selected) the flag "la57" will not show up [#f1]_.
> > +For example, if Linear Address Masking (LAM) is not enabled when building (i.e.,
> > +CONFIG_ADDRESS_MASKING is not selected) the flag "lam" will not show up.
> >  Even though the feature will still be detected via CPUID, the kernel disables
> > -it by clearing via setup_clear_cpu_cap(X86_FEATURE_LA57).
> > +it by clearing via setup_clear_cpu_cap(X86_FEATURE_LAM).
> 
> LOL, good one.
> 
> The rest looks nice and good to me. And FWIW, it boots fine on my Zen5 with
> 5lvl enabled.
> 
> Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de>

What's your preference on timing? v6.17 or v6.16?

Thanks,

	Ingo


  reply	other threads:[~2025-05-16 15:47 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20250516091534.3414310-1-kirill.shutemov@linux.intel.com>
     [not found] ` <20250516091534.3414310-2-kirill.shutemov@linux.intel.com>
2025-05-16  9:50   ` [PATCHv2 1/3] x86/64/mm: Always use dynamic memory layout Ard Biesheuvel
     [not found] ` <20250516091534.3414310-3-kirill.shutemov@linux.intel.com>
2025-05-16  9:51   ` [PATCHv2 2/3] x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model Ard Biesheuvel
     [not found] ` <20250516091534.3414310-4-kirill.shutemov@linux.intel.com>
2025-05-16  9:54   ` [PATCHv2 3/3] x86/64/mm: Make 5-level paging support unconditional Ard Biesheuvel
2025-05-16 10:42   ` Jürgen Groß
2025-05-16 11:09     ` Kirill A. Shutemov
2025-05-16 11:29       ` Jürgen Groß
2025-05-16 11:47         ` Kirill A. Shutemov
2025-05-16 11:51           ` Juergen Gross
2025-05-16 11:51           ` Kirill A. Shutemov
2025-05-16 15:30   ` Borislav Petkov
2025-05-16 15:46     ` Ingo Molnar [this message]
2025-05-16 15:56       ` Borislav Petkov
2025-05-17  8:44         ` Ingo Molnar
2025-06-24  8:11 ` [PATCHv2 0/3] x86: Make 5-level paging support unconditional for x86-64 Khalid Ali
2025-06-24  8:22   ` H. Peter Anvin
2025-06-24  8:49   ` Kirill A. Shutemov

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