[LSF/MM ATTEND] HMM, CDM and other infrastructure for device memory management

[John Hubbard <jhubbard@nvidia.com>]

Hi,

I would like to attend this topic that Jerome has proposed. Studying the 
kernel is a deep personal interest in addition to my career focus, and it 
would be a rare privilege to work directly with some of you to converge 
on some nice, clean designs for the kernel and these "new" 
(page-fault-capable) devices that we have now. Here's what I can bring to 
the discussion:

a) An NVIDIA perspective on, and experience with, using the HMM patchset, 
versions 1-15, at the device driver level. In addition to working on the 
nvidia-uvm.ko driver (which handles CPU and GPU page faulting) since its 
inception, I've also helped develop and maintain various facets of our GPU 
device driver for Linux, for the last 9 years.

As a semi-relevant aside, our company is allocating engineering time, 
including mine, for long-term kernel projects such as this one. We want to 
participate in maintaining and improving the kernel. I find that highly 
encouraging and I hope others do, too. Times really are changing.

b) Some thoughts about the dividing line between core kernel and drivers. 
Our device drivers are starting to push the limits of what drivers should 
really do (we are heading perhaps too deeply into memory management), and 
of course I want to avoid going too far. For example, I've seen 
recent comments on linux-mm that drivers shouldn't even take mmap_sem, 
which is intriguing. We need to provide...something for that, though. 

c) Some thoughts about dealing with both HMM and ATS in the same driver 
(our devices have to support both--although, not at the same time).

--

For this discussion track, I'm especially interested in simultaneously 
considering:

1. HMM (Jerome's Heterogeneous Memory Management patchset): this solves a 
similar problem as ATS (Address Translation Services: unified CPU and
Device page tables), but without the need for specialized hardware. There 
is a bit of overlap between the HMM and ATS+NUMA patchsets, as has been 
discussed here before.

2. IBM's ATS+NUMA patchset.

3. Page-fault-capable devices in general.

thanks,
John Hubbard 

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