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From: David Laight <David.Laight@ACULAB.COM>
To: 'Thomas Gleixner' <tglx@linutronix.de>,
	Matthew Wilcox <willy@infradead.org>
Cc: "'Kirill A. Shutemov'" <kirill.shutemov@linux.intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"x86@kernel.org" <x86@kernel.org>,
	"Andrey Ryabinin" <aryabinin@virtuozzo.com>,
	Alexander Potapenko <glider@google.com>,
	Dmitry Vyukov <dvyukov@google.com>,
	"H . J . Lu" <hjl.tools@gmail.com>,
	"Andi Kleen" <ak@linux.intel.com>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] x86: Implement Linear Address Masking support
Date: Thu, 12 May 2022 15:33:52 +0000	[thread overview]
Message-ID: <bb5b14dd1b484a59b8b51517e6fa1101@AcuMS.aculab.com> (raw)
In-Reply-To: <87v8uavlha.ffs@tglx>

From: Thomas Gleixner
> Sent: 12 May 2022 16:07
> 
> On Thu, May 12 2022 at 15:07, Matthew Wilcox wrote:
> > On Thu, May 12, 2022 at 01:01:07PM +0000, David Laight wrote:
> >> > +static inline int64_t sign_extend64(uint64_t value, int index)
> >> > +{
> >> > +    int shift = 63 - index;
> >> > +    return (int64_t)(value << shift) >> shift;
> >> > +}
> >>
> >> Shift of signed integers are UB.
> >
> > Citation needed.
> 
> I'll bite :)
> 
> C11/19: 6.5.7 Bitwise shift operators
> 
>   4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated
>     bits are filled with zeros. If E1 has an unsigned type, the value of
>     the result is E1 × 2E2, reduced modulo one more than the maximum
>     value representable in the result type. If E1 has a signed type and
>     nonnegative value, and E1 × 2E2 is representable in the result type,
>     then that is the resulting value; otherwise, the behavior is
>     undefined.
> 
> This is irrelevant for the case above because the left shift is on an
> unsigned integer. The interesting part is this:
> 
>   5 The result of E1 >> E2 is E1 right-shifted E2 bit positions. If E1
>     has an unsigned type or if E1 has a signed type and a nonnegative
>     value, the value of the result is the integral part of the quotient
>     of E1/2E2.  If E1 has a signed type and a negative value, the
>     resulting value is implementation-defined.
> 
> So it's not UB, it's implementation defined. The obvious choice is to
> keep LSB set, i.e. arithmetic shift, what both GCC and clang do.

I'm sure someone recently said one of the standards had made them UB.

In any case, given the caller seems to know whether the top bit is set
(and does a different call) using |= or &= is distinctly better.
Especially since the required constant can be computed in a slow path.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)

  reply	other threads:[~2022-05-12 15:39 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-11  2:27 [RFCv2 00/10] Linear Address Masking enabling Kirill A. Shutemov
2022-05-11  2:27 ` [PATCH] x86: Implement Linear Address Masking support Kirill A. Shutemov
2022-05-12 13:01   ` David Laight
2022-05-12 14:07     ` Matthew Wilcox
2022-05-12 15:06       ` Thomas Gleixner
2022-05-12 15:33         ` David Laight [this message]
2022-05-12 14:35     ` Peter Zijlstra
2022-05-12 17:00     ` Kirill A. Shutemov
2022-05-11  2:27 ` [RFCv2 01/10] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-05-11  2:27 ` [RFCv2 02/10] x86: CPUID and CR3/CR4 flags for Linear Address Masking Kirill A. Shutemov
2022-05-11  2:27 ` [RFCv2 03/10] x86: Introduce userspace API to handle per-thread features Kirill A. Shutemov
2022-05-12 12:02   ` Thomas Gleixner
2022-05-12 12:04     ` [PATCH] x86/prctl: Remove pointless task argument Thomas Gleixner
2022-05-13 14:09   ` [RFCv2 03/10] x86: Introduce userspace API to handle per-thread features Alexander Potapenko
2022-05-13 17:34     ` Edgecombe, Rick P
2022-05-13 23:09       ` Kirill A. Shutemov
2022-05-13 23:50         ` Edgecombe, Rick P
2022-05-14  8:37           ` Thomas Gleixner
2022-05-14 23:06             ` Edgecombe, Rick P
2022-05-15  9:02               ` Thomas Gleixner
2022-05-15 18:24                 ` Edgecombe, Rick P
2022-05-15 19:38                   ` Thomas Gleixner
2022-05-15 22:01                     ` Edgecombe, Rick P
2022-05-11  2:27 ` [RFCv2 04/10] x86/mm: Introduce X86_THREAD_LAM_U48 and X86_THREAD_LAM_U57 Kirill A. Shutemov
2022-05-11  7:02   ` Peter Zijlstra
2022-05-12 12:24     ` Thomas Gleixner
2022-05-12 14:37       ` Peter Zijlstra
2022-05-11  2:27 ` [RFCv2 05/10] x86/mm: Provide untagged_addr() helper Kirill A. Shutemov
2022-05-11  7:21   ` Peter Zijlstra
2022-05-11  7:45     ` Peter Zijlstra
2022-05-12 13:06   ` Thomas Gleixner
2022-05-12 14:23     ` Peter Zijlstra
2022-05-12 15:16       ` Thomas Gleixner
2022-05-12 23:14         ` Thomas Gleixner
2022-05-13 10:14           ` David Laight
2022-05-11  2:27 ` [RFCv2 06/10] x86/uaccess: Remove tags from the address before checking Kirill A. Shutemov
2022-05-12 13:02   ` David Laight
2022-05-11  2:27 ` [RFCv2 07/10] x86/mm: Handle tagged memory accesses from kernel threads Kirill A. Shutemov
2022-05-11  7:23   ` Peter Zijlstra
2022-05-12 13:30   ` Thomas Gleixner
2022-05-11  2:27 ` [RFCv2 08/10] x86/mm: Make LAM_U48 and mappings above 47-bits mutually exclusive Kirill A. Shutemov
2022-05-12 13:36   ` Thomas Gleixner
2022-05-13 23:22     ` Kirill A. Shutemov
2022-05-14  8:37       ` Thomas Gleixner
2022-05-18  8:43   ` Bharata B Rao
2022-05-18 17:08     ` Kirill A. Shutemov
2022-05-11  2:27 ` [RFCv2 09/10] x86/mm: Add userspace API to enable Linear Address Masking Kirill A. Shutemov
2022-05-11  7:26   ` Peter Zijlstra
2022-05-12 14:46     ` Thomas Gleixner
2022-05-11 14:15   ` H.J. Lu
2022-05-12 14:21     ` Thomas Gleixner
2022-05-11  2:27 ` [RFCv2 10/10] x86: Expose thread features status in /proc/$PID/arch_status Kirill A. Shutemov
2022-05-11  6:49 ` [RFCv2 00/10] Linear Address Masking enabling Peter Zijlstra
2022-05-12 15:42   ` Thomas Gleixner
2022-05-12 16:56     ` Kirill A. Shutemov
2022-05-12 19:31       ` Thomas Gleixner
2022-05-12 23:21         ` Thomas Gleixner
2022-05-12 17:22   ` Dave Hansen
2022-05-12 19:39     ` Thomas Gleixner
2022-05-12 21:24       ` Thomas Gleixner
2022-05-13 14:43         ` Matthew Wilcox
2022-05-13 22:59         ` Kirill A. Shutemov
2022-05-12 21:51       ` Dave Hansen
2022-05-12 22:10         ` H.J. Lu
2022-05-12 23:35           ` Thomas Gleixner
2022-05-13  0:08             ` H.J. Lu
2022-05-13  0:46               ` Dave Hansen
2022-05-13  1:27                 ` Thomas Gleixner
2022-05-13  3:05                   ` Dave Hansen
2022-05-13  8:28                     ` Thomas Gleixner
2022-05-13 22:48                     ` Kirill A. Shutemov
2022-05-13  9:14                   ` Catalin Marinas
2022-05-13  9:26                     ` Thomas Gleixner
2022-05-13  0:46               ` Thomas Gleixner
2022-05-13 11:07         ` Alexander Potapenko
2022-05-13 11:28           ` David Laight
2022-05-13 12:26             ` Alexander Potapenko
2022-05-13 14:26               ` David Laight
2022-05-13 15:28                 ` Alexander Potapenko
2022-05-13 23:01           ` Kirill A. Shutemov
2022-05-14 10:00             ` Thomas Gleixner

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