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Fri, 28 Oct 2022 01:20:18 +0000 (UTC) X-FDA: 80068602516.19.F29502A Received: from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189]) by imf06.hostedemail.com (Postfix) with ESMTP id E9F1718001B for ; Fri, 28 Oct 2022 01:20:13 +0000 (UTC) Received: from canpemm500009.china.huawei.com (unknown [172.30.72.55]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4Mz4Qm4hLyzJnNK; Fri, 28 Oct 2022 09:17:20 +0800 (CST) Received: from [10.67.102.169] (10.67.102.169) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Fri, 28 Oct 2022 09:20:08 +0800 CC: , , , , , , , , , , , , , , , , , , , , , , , Barry Song , Nadav Amit , Mel Gorman , , , , Anshuman Khandual Subject: Re: [PATCH v4 2/2] arm64: support batched/deferred tlb shootdown during page reclamation To: Punit Agrawal , Barry Song <21cnbao@gmail.com> References: <20220921084302.43631-1-yangyicong@huawei.com> <20220921084302.43631-3-yangyicong@huawei.com> <168eac93-a6ee-0b2e-12bb-4222eff24561@arm.com> <8e391962-4e3a-5a56-64b4-78e8637e3b8c@huawei.com> <87o7tx5oyx.fsf@stealth> From: Yicong Yang Message-ID: Date: Fri, 28 Oct 2022 09:20:08 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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spf=pass (imf06.hostedemail.com: domain of yangyicong@huawei.com designates 45.249.212.189 as permitted sender) smtp.mailfrom=yangyicong@huawei.com; dmarc=pass (policy=quarantine) header.from=huawei.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1666920017; a=rsa-sha256; cv=none; b=ZYFeTk/OP9KJdDqh56ep+PwnSln389lEIEAQldraxWf2hVbpPezsMI5RCSIoQApKPI2wgZ RlrDDccgJFbTtWwUztTpW0kWBbXGVuV/dJWAzxua24svcCj+GKZQ/k5xWvg/JdodZMX5HZ HNvuPNZx6TGjDiRwUkwCnn9jcZMesCk= Authentication-Results: imf06.hostedemail.com; dkim=none; spf=pass (imf06.hostedemail.com: domain of yangyicong@huawei.com designates 45.249.212.189 as permitted sender) smtp.mailfrom=yangyicong@huawei.com; dmarc=pass (policy=quarantine) header.from=huawei.com X-Rspam-User: X-Rspamd-Queue-Id: E9F1718001B X-Rspamd-Server: rspam03 X-Stat-Signature: bhmxqygpseh7w7i3ea976tzacebkmir3 X-HE-Tag: 1666920013-79188 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 2022/10/27 22:19, Punit Agrawal wrote: > > [ Apologies for chiming in late in the conversation ] > > Anshuman Khandual writes: > >> On 9/28/22 05:53, Barry Song wrote: >>> On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote: >>>> >>>> On 2022/9/27 14:16, Anshuman Khandual wrote: >>>>> [...] >>>>> >>>>> On 9/21/22 14:13, Yicong Yang wrote: >>>>>> +static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm) >>>>>> +{ >>>>>> + /* for small systems with small number of CPUs, TLB shootdown is cheap */ >>>>>> + if (num_online_cpus() <= 4) >>>>> >>>>> It would be great to have some more inputs from others, whether 4 (which should >>>>> to be codified into a macro e.g ARM64_NR_CPU_DEFERRED_TLB, or something similar) >>>>> is optimal for an wide range of arm64 platforms. >>>>> >>> >>> I have tested it on a 4-cpus and 8-cpus machine. but i have no machine >>> with 5,6,7 >>> cores. >>> I saw improvement on 8-cpus machines and I found 4-cpus machines don't need >>> this patch. >>> >>> so it seems safe to have >>> if (num_online_cpus() < 8) >>> >>>> >>>> Do you prefer this macro to be static or make it configurable through kconfig then >>>> different platforms can make choice based on their own situations? It maybe hard to >>>> test on all the arm64 platforms. >>> >>> Maybe we can have this default enabled on machines with 8 and more cpus and >>> provide a tlbflush_batched = on or off to allow users enable or >>> disable it according >>> to their hardware and products. Similar example: rodata=on or off. >> >> No, sounds bit excessive. Kernel command line options should not be added >> for every possible run time switch options. >> >>> >>> Hi Anshuman, Will, Catalin, Andrew, >>> what do you think about this approach? >>> >>> BTW, haoxin mentioned another important user scenarios for tlb bach on arm64: >>> https://lore.kernel.org/lkml/393d6318-aa38-01ed-6ad8-f9eac89bf0fc@linux.alibaba.com/ >>> >>> I do believe we need it based on the expensive cost of tlb shootdown in arm64 >>> even by hardware broadcast. >> >> Alright, for now could we enable ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH selectively >> with CONFIG_EXPERT and for num_online_cpus() > 8 ? > > When running the test program in the commit in a VM, I saw benefits from > the patches at all sizes from 2, 4, 8, 32 vcpus. On the test machine, > ptep_clear_flush() went from ~1% in the unpatched version to not showing > up. > Maybe you're booting VM on a server with more than 32 cores and Barry tested on his 4 CPUs embedded platform. I guess a 4 CPU VM is not fully equivalent to a 4 CPU real machine as the tbli and dsb in the VM may influence the host as well. > Yicong mentioned that he didn't see any benefit for <= 4 CPUs but is > there any overhead? I am wondering what are the downsides of enabling > the config by default. > > Thanks, > Punit > . >