From: Vineet Gupta <vgupta@kernel.org>
To: Mike Rapoport <rppt@kernel.org>
Cc: linux-snps-arc@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-mm@kvack.org, Anshuman Khandual <anshuman.khandual@arm.com>
Subject: Re: [PATCH 16/18] ARC: mm: support 4 levels of page tables
Date: Wed, 11 Aug 2021 15:17:01 -0700 [thread overview]
Message-ID: <cfe75b58-0783-5997-c05f-3c7db88508f8@kernel.org> (raw)
In-Reply-To: <YRPCaxDC5f8N9jHW@kernel.org>
On 8/11/21 5:28 AM, Mike Rapoport wrote:
> On Tue, Aug 10, 2021 at 05:42:56PM -0700, Vineet Gupta wrote:
>> Signed-off-by: Vineet Gupta<vgupta@kernel.org>
>> ---
>> arch/arc/include/asm/page.h | 11 +++++++
>> arch/arc/include/asm/pgalloc.h | 22 +++++++++++++
>> arch/arc/include/asm/pgtable-levels.h | 45 ++++++++++++++++++++++++---
>> arch/arc/mm/fault.c | 2 ++
>> arch/arc/mm/tlbex.S | 9 ++++++
>> 5 files changed, 84 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
>> index df3cc154ae4a..883856f12afe 100644
>> --- a/arch/arc/include/asm/page.h
>> +++ b/arch/arc/include/asm/page.h
>> @@ -41,6 +41,17 @@ typedef struct {
>> #define pgd_val(x) ((x).pgd)
>> #define __pgd(x) ((pgd_t) { (x) })
>>
>> +#if CONFIG_PGTABLE_LEVELS > 3
>> +
>> +typedef struct {
>> + unsigned long pud;
>> +} pud_t;
>> +
>> +#define pud_val(x) ((x).pud)
>> +#define __pud(x) ((pud_t) { (x) })
>> +
>> +#endif
>> +
>> #if CONFIG_PGTABLE_LEVELS > 2
>>
>> typedef struct {
>> diff --git a/arch/arc/include/asm/pgalloc.h b/arch/arc/include/asm/pgalloc.h
>> index 01c2d84418ed..e99c724d9235 100644
>> --- a/arch/arc/include/asm/pgalloc.h
>> +++ b/arch/arc/include/asm/pgalloc.h
>> @@ -86,6 +86,28 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
>> }
>>
>>
>> +#if CONFIG_PGTABLE_LEVELS > 3
>> +
>> +static inline void p4d_populate(struct mm_struct *mm, p4d_t *p4dp, pud_t *pudp)
>> +{
>> + set_p4d(p4dp, __p4d((unsigned long)pudp));
>> +}
>> +
>> +static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
>> +{
>> + return (pud_t *)__get_free_page(
>> + GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_ZERO);
>> +}
>> +
>> +static inline void pud_free(struct mm_struct *mm, pud_t *pudp)
>> +{
>> + free_page((unsigned long)pudp);
>> +}
>> +
>> +#define __pud_free_tlb(tlb, pmd, addr) pud_free((tlb)->mm, pmd)
>> +
>> +#endif
>> +
>> #if CONFIG_PGTABLE_LEVELS > 2
>>
>> static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmdp)
>> diff --git a/arch/arc/include/asm/pgtable-levels.h b/arch/arc/include/asm/pgtable-levels.h
>> index 1c2f022d4ad0..2da3c4e52a91 100644
>> --- a/arch/arc/include/asm/pgtable-levels.h
>> +++ b/arch/arc/include/asm/pgtable-levels.h
>> @@ -44,8 +44,13 @@
>> /*
>> * A default 3 level paging testing setup in software walked MMU
>> * MMUv4 (8K page): <4> : <7> : <8> : <13>
>> + * A default 4 level paging testing setup in software walked MMU
>> + * MMUv4 (8K page): <4> : <3> : <4> : <8> : <13>
>> */
>> #define PGDIR_SHIFT 28
>> +#if CONFIG_PGTABLE_LEVELS > 3
>> +#define PUD_SHIFT 25
>> +#endif
>> #if CONFIG_PGTABLE_LEVELS > 2
>> #define PMD_SHIFT 21
>> #endif
>> @@ -56,17 +61,25 @@
>> #define PGDIR_MASK (~(PGDIR_SIZE - 1))
>> #define PTRS_PER_PGD BIT(32 - PGDIR_SHIFT)
>>
>> +#if CONFIG_PGTABLE_LEVELS > 3
>> +#define PUD_SIZE BIT(PUD_SHIFT)
>> +#define PUD_MASK (~(PUD_SIZE - 1))
>> +#define PTRS_PER_PUD BIT(PGDIR_SHIFT - PUD_SHIFT)
> Maybe move these into the previous #if CONFIG_PGTABLE_LEVELS > 3?
Same reasoning as the prev one. Sure there's a bit more ifdef'ery but I
think it looks more organized to me. But if you really feel strongly I
can move the code around.
-Vineet
next prev parent reply other threads:[~2021-08-11 22:17 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-11 0:42 [PATCH 00/18] ARC mm updates to support 3 or 4 levels of paging Vineet Gupta
2021-08-11 0:42 ` [PATCH 01/18] ARC: mm: simplify mmu scratch register assingment to mmu needs Vineet Gupta
2021-08-11 0:42 ` [PATCH 02/18] ARC: mm: remove tlb paranoid code Vineet Gupta
2021-08-11 0:42 ` [PATCH 03/18] ARC: mm: move mmu/cache externs out to setup.h Vineet Gupta
2021-08-11 5:10 ` Mike Rapoport
2021-08-11 18:46 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 04/18] ARC: mm: remove pgd_offset_fast Vineet Gupta
2021-08-11 5:12 ` Mike Rapoport
2021-08-11 18:54 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 05/18] ARC: mm: Fixes to allow STRICT_MM_TYPECHECKS Vineet Gupta
2021-08-11 0:42 ` [PATCH 06/18] ARC: mm: Enable STRICT_MM_TYPECHECKS Vineet Gupta
2021-08-11 12:04 ` Mike Rapoport
2021-08-11 19:01 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 07/18] ARC: ioremap: use more commonly used PAGE_KERNEL based uncached flag Vineet Gupta
2021-08-11 5:18 ` Mike Rapoport
2021-08-11 18:58 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 08/18] ARC: mm: pmd_populate* to use the canonical set_pmd (and drop pmd_set) Vineet Gupta
2021-08-11 0:42 ` [PATCH 09/18] ARC: mm: non-functional code cleanup ahead of 3 levels Vineet Gupta
2021-08-11 12:31 ` Mike Rapoport
2021-08-12 1:37 ` Vineet Gupta
2021-08-12 6:18 ` Mike Rapoport
2021-08-12 18:58 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 10/18] ARC: mm: move MMU specific bits out of ASID allocator Vineet Gupta
2021-08-11 0:42 ` [PATCH 11/18] ARC: mm: move MMU specific bits out of entry code Vineet Gupta
2021-08-11 12:15 ` Mike Rapoport
2021-08-11 19:30 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 12/18] ARC: mm: disintegrate mmu.h (arcv2 bits out) Vineet Gupta
2021-08-11 0:42 ` [PATCH 13/18] ARC: mm: disintegrate pgtable.h into levels and flags Vineet Gupta
2021-08-11 0:42 ` [PATCH 14/18] ARC: mm: hack to allow 2 level build with 4 level code Vineet Gupta
2021-08-11 0:42 ` [PATCH 15/18] ARC: mm: support 3 levels of page tables Vineet Gupta
2021-08-11 12:24 ` Mike Rapoport
2021-08-11 22:15 ` Vineet Gupta
2021-08-11 0:42 ` [PATCH 16/18] ARC: mm: support 4 " Vineet Gupta
2021-08-11 12:28 ` Mike Rapoport
2021-08-11 22:17 ` Vineet Gupta [this message]
2021-08-11 0:42 ` [PATCH 17/18] ARC: mm: vmalloc sync from kernel to user table to update PMD Vineet Gupta
2021-08-11 0:42 ` [PATCH 18/18] ARC: mm: introduce _PAGE_TABLE to explicitly link pgd,pud,pmd entries Vineet Gupta
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