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X-CSE-ConnectionGUID: REg/MzVrSdmP3oDUNvD4rg== X-CSE-MsgGUID: o79kQwyUQZWjlvASHjDdxA== X-IronPort-AV: E=McAfee;i="6800,10657,11765"; a="77825813" X-IronPort-AV: E=Sophos;i="6.23,195,1770624000"; d="scan'208";a="77825813" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2026 10:56:11 -0700 X-CSE-ConnectionGUID: kq5U7E4nTBurAK6FbWX4Fg== X-CSE-MsgGUID: c8PrEufTT7GgBg2zPvyWYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,195,1770624000"; d="scan'208";a="226192054" Received: from aduenasd-mobl5.amr.corp.intel.com (HELO [10.125.108.10]) ([10.125.108.10]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2026 10:56:10 -0700 Content-Type: multipart/mixed; boundary="------------TpncX0p2dB2Ohe6Tw0NCcsID" Message-ID: Date: Thu, 23 Apr 2026 10:56:03 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7.2 v9 2/2] x86/tlb: skip redundant sync IPIs for native TLB flush To: Lance Yang , akpm@linux-foundation.org Cc: peterz@infradead.org, david@kernel.org, dave.hansen@linux.intel.com, ypodemsk@redhat.com, hughd@google.com, will@kernel.org, aneesh.kumar@kernel.org, npiggin@gmail.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com, arnd@arndb.de, ljs@kernel.org, ziy@nvidia.com, baolin.wang@linux.alibaba.com, Liam.Howlett@oracle.com, npache@redhat.com, ryan.roberts@arm.com, dev.jain@arm.com, baohua@kernel.org, shy828301@gmail.com, riel@surriel.com, jannh@google.com, jgross@suse.com, seanjc@google.com, pbonzini@redhat.com, boris.ostrovsky@oracle.com, virtualization@lists.linux.dev, kvm@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, ioworker0@gmail.com References: <20260420030851.6735-1-lance.yang@linux.dev> <20260420030851.6735-3-lance.yang@linux.dev> Content-Language: en-US From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 4/19/26 20:08, Lance Yang wrote: > - flush_tlb_mm_range(tlb->mm, start, end, stride_shift, tlb->freed_tables); > + /* > + * Treat unshared_tables just like freed_tables, such that lazy-TLB > + * CPUs also receive IPIs during unsharing of page tables, allowing > + * us to safely implement tlb_table_flush_implies_ipi_broadcast(). > + */ > + flush_tlb_mm_range(tlb->mm, start, end, stride_shift, > + tlb->freed_tables || tlb->unshared_tables); > } I've been staring at this trying to make sense of it for too long. Right now, flush_tlb_mm_range() literally has an argument named "freed_tables" and "tlb->freed_tables" is passed there. That seems totally sane. It's 100% straightforward to follow. But it makes zero logical sense to me to now mix "tlb->unshared_tables" in there. Sure, what you _want_ is the freed_tables==1 behavior from tlb->unshared_tables==1, and this obviously hacks that in there, but it's not explained well enough and not maintainable like this. IOW, it's still just hack. I think what's happened here is that info->freed_tables is being modified from being strictly related to page table freeing, and moved over to a bit which tells TLB flushing implementations whether they can respect CPUs in lazy TLB mode. It's mentioned in the comment, but then ever reflected into the code. Shouldn't we be doing something like the attached patch? Look at how that maps over to the flushing side, like in the hyperv code: > - bool do_lazy = !info->freed_tables; > + bool do_lazy = !info->wake_lazy_cpus; > > trace_hyperv_mmu_flush_tlb_multi(cpus, info); > > @@ -198,7 +198,7 @@ static u64 hyperv_flush_tlb_others_ex(co > > flush->hv_vp_set.format = HV_GENERIC_SET_SPARSE_4K; > nr_bank = cpumask_to_vpset_skip(&flush->hv_vp_set, cpus, > - info->freed_tables ? NULL : cpu_is_lazy); > + info->wake_lazy_cpus ? NULL : cpu_is_lazy); That even makes the hyperv code easier to read over what was there before, IMNHO. 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