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From: Seungwon Jeon <tgih.jun@samsung.com>
To: 'Jaehoon Chung' <jh80.chung@samsung.com>
Cc: 'Joonyoung Shim' <jy0922.shim@samsung.com>,
	linux-mmc@vger.kernel.org, cjb@laptop.org,
	will.newton@imgtec.com
Subject: RE: [PATCH] mmc: dw_mmc: clear INSTS register when initialize
Date: Wed, 24 Apr 2013 10:34:44 +0900	[thread overview]
Message-ID: <000601ce408b$e60a4e70$b21eeb50$%jun@samsung.com> (raw)
In-Reply-To: <51766112.7070806@samsung.com>

On Tuesday, April 23, 2013, Jaehoon Chung wrote:
> On 04/23/2013 06:57 PM, Seungwon Jeon wrote:
> > Hi,
> >
> > On Thursday, April 18, 2013, Joonyoung Shim wrote:
> >> If pending interrupt for IDMAC exists when probe, it will call interrupt
> >> handler unnecessarily.
> >>
> >> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
> >> ---
> >>  drivers/mmc/host/dw_mmc.c |    3 +++
> >>  1 file changed, 3 insertions(+)
> >>
> >> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> >> index 323c502..b0057a2 100644
> >> --- a/drivers/mmc/host/dw_mmc.c
> >> +++ b/drivers/mmc/host/dw_mmc.c
> >> @@ -2192,6 +2192,7 @@ int dw_mci_probe(struct dw_mci *host)
> >>
> >>  	/* Clear the interrupts for the host controller */
> >>  	mci_writel(host, RINTSTS, 0xFFFFFFFF);
> >> +	mci_writel(host, IDSTS, 0xFFFFFFFF);
> > 0x337 is correct for bits. Could you check the bit filed?
> I think that don't care which reset value used.
> "It is recommended that you write 0xffff_ffff to the Raw Interrupt register @0x044 and IDSTS @0x8C
> in order to clear any pending interrupts before setting the int_enable bit."
> This boot mode case is also used the 0xffff_ffff.
In case IDSTS all 32bit are not for interrupt status unlike RINTSTS.
IDSTS[31:17] is reserved and IDSTS[16:0] also contains 'reserved' and 'read-only' field.
Correct use would be needed.

Thanks,
Seungwon Jeon
> >
> >>  	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */
> >>
> >>  	/* Put in max timeout */
> >> @@ -2243,6 +2244,7 @@ int dw_mci_probe(struct dw_mci *host)
> >>  	 * receive ready and error such as transmit, receive timeout, crc error
> >>  	 */
> >>  	mci_writel(host, RINTSTS, 0xFFFFFFFF);
> >> +	mci_writel(host, IDSTS, 0xFFFFFFFF);
> > No need, it's already done above.
> >
> >>  	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
> >>  		   SDMMC_INT_TXDR | SDMMC_INT_RXDR |
> >>  		   DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
> >> @@ -2393,6 +2395,7 @@ int dw_mci_resume(struct dw_mci *host)
> >>  	mci_writel(host, FIFOTH, host->fifoth_val);
> >>
> >>  	mci_writel(host, RINTSTS, 0xFFFFFFFF);
> >> +	mci_writel(host, IDSTS, 0xFFFFFFFF);
> > Same, incorrect bits.
> >
> > Thanks,
> > Seungwon Jeon
> >
> >>  	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
> >>  		   SDMMC_INT_TXDR | SDMMC_INT_RXDR |
> >>  		   DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
> >> --
> >> 1.7.9.5
> >>
> >> --
> >> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> >> the body of a message to majordomo@vger.kernel.org
> >> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >
> >


  reply	other threads:[~2013-04-24  1:34 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-18  5:21 [PATCH] mmc: dw_mmc: clear INSTS register when initialize Joonyoung Shim
2013-04-18  6:59 ` Jaehoon Chung
2013-04-23  9:57 ` Seungwon Jeon
2013-04-23 10:23   ` Jaehoon Chung
2013-04-24  1:34     ` Seungwon Jeon [this message]
2013-04-24  3:05       ` Joonyoung Shim
2013-04-25  0:45         ` Jaehoon Chung
2013-04-25  7:49           ` Joonyoung Shim
2013-04-26  4:24             ` Seungwon Jeon
2013-04-26  5:18               ` Jaehoon Chung
2013-04-26  5:35                 ` Seungwon Jeon

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