From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kukjin Kim <kgene.kim@samsung.com>
Subject: RE: [PATCH] SDHCI: add no hi-speed bit quirk support
Date: Mon, 07 Jun 2010 16:58:24 +0900
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To: 'Kyungmin Park' <kmpark@infradead.org>
Cc: linux-mmc@vger.kernel.org

Kyungmin Park wrote:
>
> Some SDHCI controllr like s5pc110 doesn't have HISPD bit at HOSTCTL
register.
> 
> Signed-off-by: Kyungmin Park <kyungmin.park <at> samsung.com>
> ---
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index c6d1bd8..cba08ce 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1164,7 +1164,8 @@ static void sdhci_set_ios(struct mmc_host *mmc,
struct mmc_ios *ios)
>  	else
>  		ctrl &= ~SDHCI_CTRL_4BITBUS;
> 
> -	if (ios->timing == MMC_TIMING_SD_HS)
> +	if (ios->timing == MMC_TIMING_SD_HS &&
> +	    !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))

host->quirks |= SDHCI_QURIK_NO_HISPD_BIT missed in
drivers/mmc/host/sdhci-s3c.c

>  		ctrl |= SDHCI_CTRL_HISPD;
>  	else
>  		ctrl &= ~SDHCI_CTRL_HISPD;
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index c846813..a78152d 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -240,6 +240,8 @@ struct sdhci_host {
>  #define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
>  /* Controller cannot support End Attribute in NOP ADMA descriptor */
>  #define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
> +/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
> +#define SDHCI_QUIRK_NO_HISPD_BIT			(1<<27)
> 
>  	int			irq;		/* Device IRQ */
>  	void __iomem *		ioaddr;		/* Mapped address */

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.