From: Adrian Hunter <adrian.hunter@intel.com>
To: Liming Sun <limings@nvidia.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
David Thompson <davthompson@nvidia.com>
Cc: "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 1/1] mmc: sdhci-of-dwcmshc: Enable timeout quirk for BlueField-3 SoC
Date: Tue, 21 Nov 2023 10:08:51 +0200 [thread overview]
Message-ID: <02251b86-d0ae-4e4a-af3c-b508a92e517f@intel.com> (raw)
In-Reply-To: <BN9PR12MB50688354602B03E9E637C02FD3B4A@BN9PR12MB5068.namprd12.prod.outlook.com>
On 20/11/23 17:18, Liming Sun wrote:
>
>
>> -----Original Message-----
>> From: Adrian Hunter <adrian.hunter@intel.com>
>> Sent: Monday, November 20, 2023 1:49 AM
>> To: Liming Sun <limings@nvidia.com>; Ulf Hansson <ulf.hansson@linaro.org>;
>> David Thompson <davthompson@nvidia.com>
>> Cc: linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH v1 1/1] mmc: sdhci-of-dwcmshc: Enable timeout quirk for
>> BlueField-3 SoC
>>
>> On 18/11/23 15:46, Liming Sun wrote:
>>> This commit enables SDHCI_QUIRK_BROKEN_TIMEOUT_VAL to solve the
>>> intermittent eMMC timeout issue reported on some cards under eMMC
>>> stress test.
>>>
>>> Reported error message:
>>> dwcmshc MLNXBF30:00: __mmc_blk_ioctl_cmd: data error -110
>>
>> Were you able to determine the root cause? For example,
>> is the host controller timeout correct, is the eMMC
>> providing correct timeout values, is the mmc subsystem
>> calculating a correct value, is sdhci programming a correct
>> value?
>>
>> If there are problems outside the host controller then we
>> need to address them also.
>
> It is caused by the host controller timeout, but is hard to tell whether the
> configuration provided by the card is good enough since it's
> intermittent under stress test the SoC needs to work with different eMMC vendors.
> In UEFI eMMC driver similar max timeout (0xe) is used to avoid such
> issue. This commit tries to use existing quirk, which I think that it would work
> if there is another way to adjust the TOUT_CNT register. Any concern or suggestions?
If cards are providing timeout values that are too low under stress,
it would be better to fix it in the mmc subsystem so that all host
controllers can benefit.
>
>>
>>>
>>> Signed-off-by: Liming Sun <limings@nvidia.com>
>>
>> Fixes tag?
>
> Will update it in v2.
>
>>
>>> ---
>>> drivers/mmc/host/sdhci-of-dwcmshc.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
>> b/drivers/mmc/host/sdhci-of-dwcmshc.c
>>> index 3a3bae6948a8..3c8fe8aec558 100644
>>> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
>>> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
>>> @@ -365,7 +365,8 @@ static const struct sdhci_pltfm_data
>> sdhci_dwcmshc_pdata = {
>>> #ifdef CONFIG_ACPI
>>> static const struct sdhci_pltfm_data sdhci_dwcmshc_bf3_pdata = {
>>> .ops = &sdhci_dwcmshc_ops,
>>> - .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
>>> + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
>>> + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
>>> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
>>> SDHCI_QUIRK2_ACMD23_BROKEN,
>>> };
>
next prev parent reply other threads:[~2023-11-21 8:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-18 13:46 [PATCH v1 1/1] mmc: sdhci-of-dwcmshc: Enable timeout quirk for BlueField-3 SoC Liming Sun
2023-11-20 6:49 ` Adrian Hunter
2023-11-20 15:18 ` Liming Sun
2023-11-21 8:08 ` Adrian Hunter [this message]
2023-11-27 13:36 ` Christian Loehle
2023-11-30 13:19 ` Liming Sun
2023-12-11 11:38 ` Adrian Hunter
2023-12-19 21:18 ` Liming Sun
2024-01-04 9:24 ` Adrian Hunter
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