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From: Kevin Liu <keyuan.liu@gmail.com>
To: linux-mmc@vger.kernel.org, cjb@laptop.org, pierre@ossman.eu
Cc: hzhuang1@marvell.com, cxie4@marvell.com, prakity@marvell.com,
	kliu5@marvell.com, Jialing Fu <jlfu@marvell.com>,
	Tim Wang <wangtt@marvell.com>
Subject: [PATCH 2/6] mmc: sdhci: fix transfer mode setting bug for cmds w/o data transfer
Date: Wed, 19 Sep 2012 10:12:38 +0800	[thread overview]
Message-ID: <1348020762-12932-3-git-send-email-keyuan.liu@gmail.com> (raw)
In-Reply-To: <1348020762-12932-1-git-send-email-keyuan.liu@gmail.com>

From: Kevin Liu <kliu5@marvell.com>

Commands without data transfer like cmd5/cmd7 will use previous
transfer mode setting, which may lead to error since some bits
may have been set unexpectedly.
For example, cmd5 following cmd18/cmd25 will have timeout error
since audo cmd23 has been enabled.

Signed-off-by: Jialing Fu <jlfu@marvell.com>
Signed-off-by: Tim Wang <wangtt@marvell.com>
Signed-off-by: Kevin Liu <kliu5@marvell.com>
---
 drivers/mmc/host/sdhci.c |   22 ++++++++++++++--------
 1 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 0e15c79..2f844e5 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -886,8 +886,21 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
 	u16 mode;
 	struct mmc_data *data = cmd->data;
 
-	if (data == NULL)
+	if (data == NULL) {
+		if (cmd->opcode == MMC_SEND_TUNING_BLOCK ||
+			cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200)
+			/*
+			 * The tuning block is sent by the card to the host
+			 * controller. So we set the TRNS_READ bit in the
+			 * Transfer Mode register. This also takes care of
+			 * setting DMA Enable and Multi Block Select in the
+			 * same register to 0.
+			 */
+			sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
+		else
+			sdhci_writew(host, 0, SDHCI_TRANSFER_MODE);
 		return;
+	}
 
 	WARN_ON(!host->data);
 
@@ -1850,13 +1863,6 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 				     SDHCI_BLOCK_SIZE);
 		}
 
-		/*
-		 * The tuning block is sent by the card to the host controller.
-		 * So we set the TRNS_READ bit in the Transfer Mode register.
-		 * This also takes care of setting DMA Enable and Multi Block
-		 * Select in the same register to 0.
-		 */
-		sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
 
 		sdhci_send_command(host, &cmd);
 
-- 
1.7.0.4


  parent reply	other threads:[~2012-09-19  2:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-19  2:12 [PATCH 0/6] mmc: sdhci: fixes and enhancements Kevin Liu
2012-09-19  2:12 ` [PATCH 1/6] mmc: sdhci-pxav3: fix build error Kevin Liu
2012-09-19  2:47   ` Chris Ball
2012-09-19  2:12 ` Kevin Liu [this message]
2012-09-19  2:12 ` [PATCH 3/6] mmc: sdhci: set regulator min/max voltage according to spec Kevin Liu
2012-09-19  2:12 ` [PATCH 4/6] mmc: sdhci: refine code for sd clock disable/enable in set ios Kevin Liu
2012-09-19  2:12 ` [PATCH 5/6] mmc: sdhci: keep the saved clock var up to date Kevin Liu
2012-09-19  2:12 ` [PATCH 6/6] mmc: sdhci: fix null return check of regulator_get Kevin Liu
2012-09-19  2:50   ` Chris Ball
2012-09-19  2:53 ` [PATCH 0/6] mmc: sdhci: fixes and enhancements Chris Ball
2012-09-19  7:52   ` Kevin Liu

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