From: <dinguyen@altera.com>
To: dinh.linux@gmail.com, arnd@arndb.de, cjb@laptop.org,
jh80.chung@samsung.com, tgih.jun@samsung.com, heiko@sntech.de,
dianders@chromium.org, alim.akhtar@samsung.com,
bzhao@marvell.com, mturquette@linaro.org
Cc: zhangfei.gao@linaro.org, linux-mmc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Dinh Nguyen <dinguyen@altera.com>
Subject: [RESEND LIST PATCHv7 0/4] socfpga: Enable SD/MMC support
Date: Mon, 16 Dec 2013 11:04:32 -0600 [thread overview]
Message-ID: <1387213476-22122-1-git-send-email-dinguyen@altera.com> (raw)
From: Dinh Nguyen <dinguyen@altera.com>
RESEND: Apologies, re-send with CC to all the appropriate lists.
Hi,
This is v7 of the patch series to enable SD/MMC on the SOCFPGA platform.
V7 differences from V6:
* Add a new clock binding property clk-phase. This property is used to
represent the 2 clock phase values that is needed for the SD/MMC driver.
Thanks,
Dinh Nguyen (4):
clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk"
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
mmc: dw_mmc-socfpga: Remove the SOCFPGA specific platform for dw_mmc
ARM: socfpga_defconfig: enable SD/MMC support
.../devicetree/bindings/clock/altr_socfpga.txt | 14 ++
arch/arm/boot/dts/socfpga.dtsi | 14 +-
arch/arm/boot/dts/socfpga_arria5.dtsi | 11 ++
arch/arm/boot/dts/socfpga_cyclone5.dtsi | 11 ++
arch/arm/boot/dts/socfpga_vt.dts | 11 ++
arch/arm/configs/socfpga_defconfig | 2 +
drivers/clk/socfpga/clk.c | 37 ++++++
drivers/mmc/host/Kconfig | 8 --
drivers/mmc/host/dw_mmc-socfpga.c | 138 --------------------
9 files changed, 99 insertions(+), 147 deletions(-)
delete mode 100644 drivers/mmc/host/dw_mmc-socfpga.c
--
1.7.9.5
next reply other threads:[~2013-12-16 17:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 17:04 dinguyen [this message]
2013-12-16 17:04 ` [RESEND LIST PATCHv7 1/4] clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk" dinguyen
2013-12-17 7:46 ` zhangfei
2013-12-17 13:44 ` Dinh Nguyen
2013-12-17 14:47 ` zhangfei
2013-12-17 23:55 ` [RESEND LIST PATCHv7 1/4] clk: socfpga: Add a clk-phase property to the "altr, socfpga-gate-clk" Mike Turquette
2013-12-18 4:06 ` Dinh Nguyen
2013-12-18 20:56 ` Mike Turquette
2013-12-18 21:21 ` Arnd Bergmann
2013-12-19 4:04 ` Dinh Nguyen
2013-12-19 5:50 ` Arnd Bergmann
2013-12-16 17:04 ` [RESEND LIST PATCHv7 2/4] dts: socfpga: Add support for SD/MMC on the SOCFPGA platform dinguyen
2013-12-16 17:04 ` [RESEND LIST PATCHv7 3/4] mmc: dw_mmc-socfpga: Remove the SOCFPGA specific platform for dw_mmc dinguyen
2013-12-16 17:04 ` [RESEND LIST PATCHv7 4/4] ARM: socfpga_defconfig: enable SD/MMC support dinguyen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1387213476-22122-1-git-send-email-dinguyen@altera.com \
--to=dinguyen@altera.com \
--cc=alim.akhtar@samsung.com \
--cc=arnd@arndb.de \
--cc=bzhao@marvell.com \
--cc=cjb@laptop.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=dinh.linux@gmail.com \
--cc=heiko@sntech.de \
--cc=jh80.chung@samsung.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-mmc@vger.kernel.org \
--cc=mturquette@linaro.org \
--cc=tgih.jun@samsung.com \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).