[PATCH v3 1/3] mmc: core: enable CMD19 tuning for DDR50 mode

[PATCH v3 1/3] mmc: core: enable CMD19 tuning for DDR50 mode

[Barry Song]

From: Weijun Yang <york.yang@csr.com>

As SD Specifications Part1 Physical Layer Specification Version
3.01 says, CMD19 tuning is available for unlocked cards in transfer
state of 1.8V signaling mode. The small difference between v3.00
and 3.01 spec means that CMD19 tuning is also available for DDR50
mode.

Signed-off-by: Weijun Yang <york.yang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
 drivers/mmc/core/sd.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 4e7366a..eaf8cb3 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -628,9 +628,24 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card)
 	 * SDR104 mode SD-cards. Note that tuning is mandatory for SDR104.
 	 */
 	if (!mmc_host_is_spi(card->host) &&
-	    (card->sd_bus_speed == UHS_SDR50_BUS_SPEED ||
-	     card->sd_bus_speed == UHS_SDR104_BUS_SPEED))
+		(card->sd_bus_speed == UHS_SDR50_BUS_SPEED ||
+		 card->sd_bus_speed == UHS_DDR50_BUS_SPEED ||
+		 card->sd_bus_speed == UHS_SDR104_BUS_SPEED)) {
 		err = mmc_execute_tuning(card);
+
+		/*
+		 * As SD Specifications Part1 Physical Layer Specification Version
+		 * 3.01 says, CMD19 tuning is available for unlocked cards in transfer
+		 * state of 1.8V signaling mode. The small difference between v3.00
+		 * and 3.01 spec means that CMD19 tuning is also available for DDR50
+		 * mode.
+		 */
+		if (err && (card->sd_bus_speed == UHS_DDR50_BUS_SPEED)) {
+			pr_warn("%s: ddr50 tuning failed\n", mmc_hostname(card->host));
+			err = 0;
+		}
+	}
+
 out:
 	kfree(status);
 
-- 
1.9.1

[PATCH v3 2/3] mmc: sdhci: enable tuning for DDR50

[Barry Song]

From: Weijun Yang <york.yang@csr.com>

CMD19 tuning is also available for DDR50 mode.

Signed-off-by: Weijun Yang <york.yang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
 drivers/mmc/host/sdhci.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 64b7fdb..2ea30fa 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1893,9 +1893,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 		tuning_count = host->tuning_count;
 
 	/*
-	 * The Host Controller needs tuning only in case of SDR104 mode
-	 * and for SDR50 mode when Use Tuning for SDR50 is set in the
-	 * Capabilities register.
+	 * The Host Controller needs tuning in case of SDR104 and DDR5
+	 * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
+	 * the Capabilities register.
 	 * If the Host Controller supports the HS200 mode then the
 	 * tuning function has to be executed.
 	 */
@@ -1915,6 +1915,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 		break;
 
 	case MMC_TIMING_UHS_SDR104:
+	case MMC_TIMING_UHS_DDR50:
 		break;
 
 	case MMC_TIMING_UHS_SDR50:
-- 
1.9.1

[PATCH v3 3/3] mmc: sirf: fix the capbility to support DDR50

[Barry Song]

From: Weijun Yang <york.yang@csr.com>

According to hardware spec, validate DDR50 mode
for SDXC.

Signed-off-by: Weijun Yang <york.yang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
 drivers/mmc/host/sdhci-sirf.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index 8842945..f5488c4 100644
--- a/drivers/mmc/host/sdhci-sirf.c
+++ b/drivers/mmc/host/sdhci-sirf.c
@@ -50,7 +50,8 @@ static u32 sdhci_sirf_readl_le(struct sdhci_host *host, int reg)
 	if (unlikely((reg == SDHCI_CAPABILITIES_1) &&
 			(host->mmc->caps & MMC_CAP_UHS_SDR50))) {
 		/* fake CAP_1 register */
-		val = SDHCI_SUPPORT_SDR50 | SDHCI_USE_SDR50_TUNING;
+		val = SDHCI_SUPPORT_DDR50 |
+			SDHCI_SUPPORT_SDR50 | SDHCI_USE_SDR50_TUNING;
 	}
 
 	if (unlikely(reg == SDHCI_SLOT_INT_STATUS)) {
-- 
1.9.1

Re: [PATCH v3 1/3] mmc: core: enable CMD19 tuning for DDR50 mode

[Ulf Hansson]

On 4 October 2015 at 14:04, Barry Song <21cnbao@gmail.com> wrote:
> From: Weijun Yang <york.yang@csr.com>
>
> As SD Specifications Part1 Physical Layer Specification Version
> 3.01 says, CMD19 tuning is available for unlocked cards in transfer
> state of 1.8V signaling mode. The small difference between v3.00
> and 3.01 spec means that CMD19 tuning is also available for DDR50
> mode.
>
> Signed-off-by: Weijun Yang <york.yang@csr.com>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>

Thanks, applied for next - although with some minor changes as described below.

> ---
>  drivers/mmc/core/sd.c | 19 +++++++++++++++++--
>  1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
> index 4e7366a..eaf8cb3 100644
> --- a/drivers/mmc/core/sd.c
> +++ b/drivers/mmc/core/sd.c
> @@ -628,9 +628,24 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card)
>          * SDR104 mode SD-cards. Note that tuning is mandatory for SDR104.
>          */
>         if (!mmc_host_is_spi(card->host) &&
> -           (card->sd_bus_speed == UHS_SDR50_BUS_SPEED ||
> -            card->sd_bus_speed == UHS_SDR104_BUS_SPEED))
> +               (card->sd_bus_speed == UHS_SDR50_BUS_SPEED ||
> +                card->sd_bus_speed == UHS_DDR50_BUS_SPEED ||
> +                card->sd_bus_speed == UHS_SDR104_BUS_SPEED)) {
>                 err = mmc_execute_tuning(card);
> +
> +               /*
> +                * As SD Specifications Part1 Physical Layer Specification Version
> +                * 3.01 says, CMD19 tuning is available for unlocked cards in transfer
> +                * state of 1.8V signaling mode. The small difference between v3.00
> +                * and 3.01 spec means that CMD19 tuning is also available for DDR50
> +                * mode.
> +                */

Checkpatch warned about long lines, so I changed them.

> +               if (err && (card->sd_bus_speed == UHS_DDR50_BUS_SPEED)) {

Removed a pair of unnecessary parentheses for this if statement.

> +                       pr_warn("%s: ddr50 tuning failed\n", mmc_hostname(card->host));
> +                       err = 0;
> +               }
> +       }
> +
>  out:
>         kfree(status);
>
> --
> 1.9.1
>

Kind regards
Uffe

Re: [PATCH v3 3/3] mmc: sirf: fix the capbility to support DDR50

[Ulf Hansson]

On 4 October 2015 at 14:04, Barry Song <21cnbao@gmail.com> wrote:
> From: Weijun Yang <york.yang@csr.com>
>
> According to hardware spec, validate DDR50 mode
> for SDXC.
>
> Signed-off-by: Weijun Yang <york.yang@csr.com>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>

Thanks, applied for next!

Kind regards
Uffe

> ---
>  drivers/mmc/host/sdhci-sirf.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
> index 8842945..f5488c4 100644
> --- a/drivers/mmc/host/sdhci-sirf.c
> +++ b/drivers/mmc/host/sdhci-sirf.c
> @@ -50,7 +50,8 @@ static u32 sdhci_sirf_readl_le(struct sdhci_host *host, int reg)
>         if (unlikely((reg == SDHCI_CAPABILITIES_1) &&
>                         (host->mmc->caps & MMC_CAP_UHS_SDR50))) {
>                 /* fake CAP_1 register */
> -               val = SDHCI_SUPPORT_SDR50 | SDHCI_USE_SDR50_TUNING;
> +               val = SDHCI_SUPPORT_DDR50 |
> +                       SDHCI_SUPPORT_SDR50 | SDHCI_USE_SDR50_TUNING;
>         }
>
>         if (unlikely(reg == SDHCI_SLOT_INT_STATUS)) {
> --
> 1.9.1
>

Re: [PATCH v3 2/3] mmc: sdhci: enable tuning for DDR50

[Ulf Hansson]

On 4 October 2015 at 14:04, Barry Song <21cnbao@gmail.com> wrote:
> From: Weijun Yang <york.yang@csr.com>
>
> CMD19 tuning is also available for DDR50 mode.
>
> Signed-off-by: Weijun Yang <york.yang@csr.com>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>

Thanks, applied for next - with a minor change.

> ---
>  drivers/mmc/host/sdhci.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 64b7fdb..2ea30fa 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1893,9 +1893,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
>                 tuning_count = host->tuning_count;
>
>         /*
> -        * The Host Controller needs tuning only in case of SDR104 mode
> -        * and for SDR50 mode when Use Tuning for SDR50 is set in the
> -        * Capabilities register.
> +        * The Host Controller needs tuning in case of SDR104 and DDR5

/s / DDR5 / DDR50

> +        * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
> +        * the Capabilities register.
>          * If the Host Controller supports the HS200 mode then the
>          * tuning function has to be executed.
>          */
> @@ -1915,6 +1915,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
>                 break;
>
>         case MMC_TIMING_UHS_SDR104:
> +       case MMC_TIMING_UHS_DDR50:
>                 break;
>
>         case MMC_TIMING_UHS_SDR50:
> --
> 1.9.1
>

Kind regards
Uffe