From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Subject: [PATCH v3 2/5] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR Date: Tue, 30 May 2017 11:14:08 +0200 Message-ID: <1496135651-90007-2-git-send-email-benoit@wsystem.com> References: <1496135651-90007-1-git-send-email-benoit@wsystem.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return-path: Received: from authsmtp81.register.it ([195.110.122.166]:39423 "EHLO authsmtp.register.it" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751288AbdE3JOl (ORCPT ); Tue, 30 May 2017 05:14:41 -0400 In-Reply-To: <1496135651-90007-1-git-send-email-benoit@wsystem.com> Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: Ulf Hansson , Adrian Hunter , Fabio Estevam , Wolfram Sang , =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= The eSDHC can only DMA from 32-bit-aligned addresses. This fixes the following test cases of mmc_test: 11: Badly aligned write 12: Badly aligned read 13: Badly aligned multi-block write 14: Badly aligned multi-block read Signed-off-by: Benoît Thébaudeau Acked-by: Adrian Hunter Reviewed-by: Fabio Estevam --- Changes v1 -> v2: none. Changes v2 -> v3: none. --- drivers/mmc/host/sdhci-esdhc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index c4bbd74..e7893f2 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -19,6 +19,7 @@ */ #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ + SDHCI_QUIRK_32BIT_DMA_ADDR | \ SDHCI_QUIRK_NO_BUSY_IRQ | \ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ SDHCI_QUIRK_PIO_NEEDS_DELAY | \ -- 2.7.4