* [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing
@ 2017-08-09 12:24 Yangbo Lu
2017-08-14 11:43 ` Adrian Hunter
0 siblings, 1 reply; 5+ messages in thread
From: Yangbo Lu @ 2017-08-09 12:24 UTC (permalink / raw)
To: linux-mmc, ulf.hansson, Adrian Hunter; +Cc: Xiaobo Xie, Yangbo Lu
eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1
register address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1)
for eSDHC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/mmc/host/sdhci-esdhc.h | 3 +++
drivers/mmc/host/sdhci-of-esdhc.c | 23 +++++++++++++++++++++--
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index c4bbd74..98898a3 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -53,6 +53,9 @@
#define ESDHC_CLOCK_HCKEN 0x00000002
#define ESDHC_CLOCK_IPGEN 0x00000001
+/* Host Controller Capabilities Register 2 */
+#define ESDHC_CAPABILITIES_1 0x114
+
/* Tuning Block Control Register */
#define ESDHC_TBCTL 0x120
#define ESDHC_TB_EN 0x00000004
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index d10f831..cd85a18 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -86,6 +86,17 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
return ret;
}
+ /*
+ * DTS properties of mmc host are used to enable each speed mode
+ * according to soc and board capability. So clean up
+ * SDR50/SDR104/DDR50 support bits here.
+ */
+ if (spec_reg == SDHCI_CAPABILITIES_1) {
+ ret = value & (~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
+ SDHCI_SUPPORT_DDR50));
+ return ret;
+ }
+
ret = value;
return ret;
}
@@ -249,7 +260,11 @@ static u32 esdhc_be_readl(struct sdhci_host *host, int reg)
u32 ret;
u32 value;
- value = ioread32be(host->ioaddr + reg);
+ if (reg == SDHCI_CAPABILITIES_1)
+ value = ioread32be(host->ioaddr + ESDHC_CAPABILITIES_1);
+ else
+ value = ioread32be(host->ioaddr + reg);
+
ret = esdhc_readl_fixup(host, reg, value);
return ret;
@@ -260,7 +275,11 @@ static u32 esdhc_le_readl(struct sdhci_host *host, int reg)
u32 ret;
u32 value;
- value = ioread32(host->ioaddr + reg);
+ if (reg == SDHCI_CAPABILITIES_1)
+ value = ioread32(host->ioaddr + ESDHC_CAPABILITIES_1);
+ else
+ value = ioread32(host->ioaddr + reg);
+
ret = esdhc_readl_fixup(host, reg, value);
return ret;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing
2017-08-09 12:24 [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing Yangbo Lu
@ 2017-08-14 11:43 ` Adrian Hunter
0 siblings, 0 replies; 5+ messages in thread
From: Adrian Hunter @ 2017-08-14 11:43 UTC (permalink / raw)
To: Yangbo Lu, linux-mmc, ulf.hansson; +Cc: Xiaobo Xie
On 09/08/17 15:24, Yangbo Lu wrote:
> eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1
> register address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1)
> for eSDHC.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Apart from the redundant parenthesis:
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> drivers/mmc/host/sdhci-esdhc.h | 3 +++
> drivers/mmc/host/sdhci-of-esdhc.c | 23 +++++++++++++++++++++--
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
> index c4bbd74..98898a3 100644
> --- a/drivers/mmc/host/sdhci-esdhc.h
> +++ b/drivers/mmc/host/sdhci-esdhc.h
> @@ -53,6 +53,9 @@
> #define ESDHC_CLOCK_HCKEN 0x00000002
> #define ESDHC_CLOCK_IPGEN 0x00000001
>
> +/* Host Controller Capabilities Register 2 */
> +#define ESDHC_CAPABILITIES_1 0x114
> +
> /* Tuning Block Control Register */
> #define ESDHC_TBCTL 0x120
> #define ESDHC_TB_EN 0x00000004
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
> index d10f831..cd85a18 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -86,6 +86,17 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
> return ret;
> }
>
> + /*
> + * DTS properties of mmc host are used to enable each speed mode
> + * according to soc and board capability. So clean up
> + * SDR50/SDR104/DDR50 support bits here.
> + */
> + if (spec_reg == SDHCI_CAPABILITIES_1) {
> + ret = value & (~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
Redundant parenthesis.
> + SDHCI_SUPPORT_DDR50));
> + return ret;
> + }
> +
> ret = value;
> return ret;
> }
> @@ -249,7 +260,11 @@ static u32 esdhc_be_readl(struct sdhci_host *host, int reg)
> u32 ret;
> u32 value;
>
> - value = ioread32be(host->ioaddr + reg);
> + if (reg == SDHCI_CAPABILITIES_1)
> + value = ioread32be(host->ioaddr + ESDHC_CAPABILITIES_1);
> + else
> + value = ioread32be(host->ioaddr + reg);
> +
> ret = esdhc_readl_fixup(host, reg, value);
>
> return ret;
> @@ -260,7 +275,11 @@ static u32 esdhc_le_readl(struct sdhci_host *host, int reg)
> u32 ret;
> u32 value;
>
> - value = ioread32(host->ioaddr + reg);
> + if (reg == SDHCI_CAPABILITIES_1)
> + value = ioread32(host->ioaddr + ESDHC_CAPABILITIES_1);
> + else
> + value = ioread32(host->ioaddr + reg);
> +
> ret = esdhc_readl_fixup(host, reg, value);
>
> return ret;
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing
@ 2017-08-15 2:17 Yangbo Lu
2017-08-15 2:36 ` Y.b. Lu
2017-08-22 11:14 ` Ulf Hansson
0 siblings, 2 replies; 5+ messages in thread
From: Yangbo Lu @ 2017-08-15 2:17 UTC (permalink / raw)
To: linux-mmc, ulf.hansson, Adrian Hunter; +Cc: Xiaobo Xie, Yangbo Lu
eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1
register address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1)
for eSDHC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
---
Changes for v2:
- Removed duplicate perenthesis.
- Added "Acked-by: Adrian Hunter".
---
drivers/mmc/host/sdhci-esdhc.h | 3 +++
drivers/mmc/host/sdhci-of-esdhc.c | 23 +++++++++++++++++++++--
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index e7893f2..dfa58f8 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -54,6 +54,9 @@
#define ESDHC_CLOCK_HCKEN 0x00000002
#define ESDHC_CLOCK_IPGEN 0x00000001
+/* Host Controller Capabilities Register 2 */
+#define ESDHC_CAPABILITIES_1 0x114
+
/* Tuning Block Control Register */
#define ESDHC_TBCTL 0x120
#define ESDHC_TB_EN 0x00000004
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 44b016b..d96a057 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -86,6 +86,17 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
return ret;
}
+ /*
+ * DTS properties of mmc host are used to enable each speed mode
+ * according to soc and board capability. So clean up
+ * SDR50/SDR104/DDR50 support bits here.
+ */
+ if (spec_reg == SDHCI_CAPABILITIES_1) {
+ ret = value & ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
+ SDHCI_SUPPORT_DDR50);
+ return ret;
+ }
+
ret = value;
return ret;
}
@@ -249,7 +260,11 @@ static u32 esdhc_be_readl(struct sdhci_host *host, int reg)
u32 ret;
u32 value;
- value = ioread32be(host->ioaddr + reg);
+ if (reg == SDHCI_CAPABILITIES_1)
+ value = ioread32be(host->ioaddr + ESDHC_CAPABILITIES_1);
+ else
+ value = ioread32be(host->ioaddr + reg);
+
ret = esdhc_readl_fixup(host, reg, value);
return ret;
@@ -260,7 +275,11 @@ static u32 esdhc_le_readl(struct sdhci_host *host, int reg)
u32 ret;
u32 value;
- value = ioread32(host->ioaddr + reg);
+ if (reg == SDHCI_CAPABILITIES_1)
+ value = ioread32(host->ioaddr + ESDHC_CAPABILITIES_1);
+ else
+ value = ioread32(host->ioaddr + reg);
+
ret = esdhc_readl_fixup(host, reg, value);
return ret;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 5+ messages in thread* RE: [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing
2017-08-15 2:17 Yangbo Lu
@ 2017-08-15 2:36 ` Y.b. Lu
2017-08-22 11:14 ` Ulf Hansson
1 sibling, 0 replies; 5+ messages in thread
From: Y.b. Lu @ 2017-08-15 2:36 UTC (permalink / raw)
To: Y.b. Lu, linux-mmc@vger.kernel.org, ulf.hansson@linaro.org,
Adrian Hunter
Cc: Xiaobo Xie
Oh... Sorry for missing 'v2' in title.
> -----Original Message-----
> From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> Sent: Tuesday, August 15, 2017 10:17 AM
> To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org; Adrian Hunter
> Cc: Xiaobo Xie; Y.b. Lu
> Subject: [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1
> accessing
>
> eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1 register
> address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1) for eSDHC.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> Changes for v2:
> - Removed duplicate perenthesis.
> - Added "Acked-by: Adrian Hunter".
> ---
> drivers/mmc/host/sdhci-esdhc.h | 3 +++
> drivers/mmc/host/sdhci-of-esdhc.c | 23 +++++++++++++++++++++--
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-
> esdhc.h index e7893f2..dfa58f8 100644
> --- a/drivers/mmc/host/sdhci-esdhc.h
> +++ b/drivers/mmc/host/sdhci-esdhc.h
> @@ -54,6 +54,9 @@
> #define ESDHC_CLOCK_HCKEN 0x00000002
> #define ESDHC_CLOCK_IPGEN 0x00000001
>
> +/* Host Controller Capabilities Register 2 */
> +#define ESDHC_CAPABILITIES_1 0x114
> +
> /* Tuning Block Control Register */
> #define ESDHC_TBCTL 0x120
> #define ESDHC_TB_EN 0x00000004
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-
> of-esdhc.c
> index 44b016b..d96a057 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -86,6 +86,17 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
> return ret;
> }
>
> + /*
> + * DTS properties of mmc host are used to enable each speed mode
> + * according to soc and board capability. So clean up
> + * SDR50/SDR104/DDR50 support bits here.
> + */
> + if (spec_reg == SDHCI_CAPABILITIES_1) {
> + ret = value & ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
> + SDHCI_SUPPORT_DDR50);
> + return ret;
> + }
> +
> ret = value;
> return ret;
> }
> @@ -249,7 +260,11 @@ static u32 esdhc_be_readl(struct sdhci_host *host,
> int reg)
> u32 ret;
> u32 value;
>
> - value = ioread32be(host->ioaddr + reg);
> + if (reg == SDHCI_CAPABILITIES_1)
> + value = ioread32be(host->ioaddr + ESDHC_CAPABILITIES_1);
> + else
> + value = ioread32be(host->ioaddr + reg);
> +
> ret = esdhc_readl_fixup(host, reg, value);
>
> return ret;
> @@ -260,7 +275,11 @@ static u32 esdhc_le_readl(struct sdhci_host *host,
> int reg)
> u32 ret;
> u32 value;
>
> - value = ioread32(host->ioaddr + reg);
> + if (reg == SDHCI_CAPABILITIES_1)
> + value = ioread32(host->ioaddr + ESDHC_CAPABILITIES_1);
> + else
> + value = ioread32(host->ioaddr + reg);
> +
> ret = esdhc_readl_fixup(host, reg, value);
>
> return ret;
> --
> 2.1.0.27.g96db324
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing
2017-08-15 2:17 Yangbo Lu
2017-08-15 2:36 ` Y.b. Lu
@ 2017-08-22 11:14 ` Ulf Hansson
1 sibling, 0 replies; 5+ messages in thread
From: Ulf Hansson @ 2017-08-22 11:14 UTC (permalink / raw)
To: Yangbo Lu; +Cc: linux-mmc@vger.kernel.org, Adrian Hunter, Xiaobo Xie
On 15 August 2017 at 04:17, Yangbo Lu <yangbo.lu@nxp.com> wrote:
> eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1
> register address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1)
> for eSDHC.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Thanks, applied for next!
Kind regards
Uffe
> ---
> Changes for v2:
> - Removed duplicate perenthesis.
> - Added "Acked-by: Adrian Hunter".
> ---
> drivers/mmc/host/sdhci-esdhc.h | 3 +++
> drivers/mmc/host/sdhci-of-esdhc.c | 23 +++++++++++++++++++++--
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
> index e7893f2..dfa58f8 100644
> --- a/drivers/mmc/host/sdhci-esdhc.h
> +++ b/drivers/mmc/host/sdhci-esdhc.h
> @@ -54,6 +54,9 @@
> #define ESDHC_CLOCK_HCKEN 0x00000002
> #define ESDHC_CLOCK_IPGEN 0x00000001
>
> +/* Host Controller Capabilities Register 2 */
> +#define ESDHC_CAPABILITIES_1 0x114
> +
> /* Tuning Block Control Register */
> #define ESDHC_TBCTL 0x120
> #define ESDHC_TB_EN 0x00000004
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
> index 44b016b..d96a057 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -86,6 +86,17 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
> return ret;
> }
>
> + /*
> + * DTS properties of mmc host are used to enable each speed mode
> + * according to soc and board capability. So clean up
> + * SDR50/SDR104/DDR50 support bits here.
> + */
> + if (spec_reg == SDHCI_CAPABILITIES_1) {
> + ret = value & ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
> + SDHCI_SUPPORT_DDR50);
> + return ret;
> + }
> +
> ret = value;
> return ret;
> }
> @@ -249,7 +260,11 @@ static u32 esdhc_be_readl(struct sdhci_host *host, int reg)
> u32 ret;
> u32 value;
>
> - value = ioread32be(host->ioaddr + reg);
> + if (reg == SDHCI_CAPABILITIES_1)
> + value = ioread32be(host->ioaddr + ESDHC_CAPABILITIES_1);
> + else
> + value = ioread32be(host->ioaddr + reg);
> +
> ret = esdhc_readl_fixup(host, reg, value);
>
> return ret;
> @@ -260,7 +275,11 @@ static u32 esdhc_le_readl(struct sdhci_host *host, int reg)
> u32 ret;
> u32 value;
>
> - value = ioread32(host->ioaddr + reg);
> + if (reg == SDHCI_CAPABILITIES_1)
> + value = ioread32(host->ioaddr + ESDHC_CAPABILITIES_1);
> + else
> + value = ioread32(host->ioaddr + reg);
> +
> ret = esdhc_readl_fixup(host, reg, value);
>
> return ret;
> --
> 2.1.0.27.g96db324
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-08-22 11:14 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2017-08-09 12:24 [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing Yangbo Lu
2017-08-14 11:43 ` Adrian Hunter
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2017-08-15 2:17 Yangbo Lu
2017-08-15 2:36 ` Y.b. Lu
2017-08-22 11:14 ` Ulf Hansson
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