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* [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
@ 2010-08-16 13:41 zhangfei gao
  2010-08-16 13:48 ` zhangfei gao
  2010-08-16 16:07 ` David Vrabel
  0 siblings, 2 replies; 10+ messages in thread
From: zhangfei gao @ 2010-08-16 13:41 UTC (permalink / raw)
  To: linux-mmc
  Cc: Anton Vorontsov, Ben Dooks, Wolfram Sang, Matt Fleming,
	Haojian Zhuang, Eric Miao

[-- Attachment #1: Type: text/plain, Size: 2859 bytes --]

>From fd40adef6ce474d5323edcaa833f675b0eb649cb Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zgao6@marvell.com>
Date: Fri, 6 Aug 2010 07:10:01 +0800
Subject: [PATCH] sdhci: support 10-bit divided clock Mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Cc: Matt Fleming <matt@console-pimps.org>
Cc: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
---
 drivers/mmc/host/sdhci.c |   22 ++++++++++++++++------
 drivers/mmc/host/sdhci.h |    5 +++++
 2 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 913555e..32dcac9 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -983,7 +983,7 @@ static void sdhci_finish_command(struct sdhci_host *host)

 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	int div;
+	int div, max_div;
 	u16 clk;
 	unsigned long timeout;

@@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host
*host, unsigned int clock)
 	if (clock == 0)
 		goto out;

-	for (div = 1;div < 256;div *= 2) {
-		if ((host->max_clk / div) <= clock)
-			break;
+	if (host->version >= SDHCI_SPEC_300)
+		max_div = 2046;
+	else
+		max_div = 256;
+
+	if(host->max_clk <= clock)
+		div = 1;
+	else {
+		for (div = 2; div < max_div; div += 2) {
+			if ((host->max_clk / div) <= clock)
+				break;
+		}
 	}
 	div >>= 1;

-	clk = div << SDHCI_DIVIDER_SHIFT;
+	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) <<
SDHCI_DIVIDER_HI_SHIFT;
 	clk |= SDHCI_CLOCK_INT_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

@@ -1707,7 +1717,7 @@ int sdhci_add_host(struct sdhci_host *host)
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 	host->version = (host->version & SDHCI_SPEC_VER_MASK)
 				>> SDHCI_SPEC_VER_SHIFT;
-	if (host->version > SDHCI_SPEC_200) {
+	if (host->version > SDHCI_SPEC_300) {
 		printk(KERN_ERR "%s: Unknown controller version (%d). "
 			"You may experience problems.\n", mmc_hostname(mmc),
 			host->version);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 036cfae..50860dc 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -86,6 +86,10 @@

 #define SDHCI_CLOCK_CONTROL	0x2C
 #define  SDHCI_DIVIDER_SHIFT	8
+#define  SDHCI_DIVIDER_HI_SHIFT	6
+#define  SDHCI_DIV_MASK	0xFF
+#define  SDHCI_DIV_MASK_LEN	8
+#define  SDHCI_DIV_HI_MASK	0x300
 #define  SDHCI_CLOCK_CARD_EN	0x0004
 #define  SDHCI_CLOCK_INT_STABLE	0x0002
 #define  SDHCI_CLOCK_INT_EN	0x0001
@@ -178,6 +182,7 @@
 #define  SDHCI_SPEC_VER_SHIFT	0
 #define   SDHCI_SPEC_100	0
 #define   SDHCI_SPEC_200	1
+#define   SDHCI_SPEC_300	2

 struct sdhci_ops;

-- 
1.7.0.4

[-- Attachment #2: 0001-sdhci-support-10-bit-divided-clock-Mode.patch --]
[-- Type: text/x-patch, Size: 2774 bytes --]

From fd40adef6ce474d5323edcaa833f675b0eb649cb Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zgao6@marvell.com>
Date: Fri, 6 Aug 2010 07:10:01 +0800
Subject: [PATCH] sdhci: support 10-bit divided clock Mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Cc: Matt Fleming <matt@console-pimps.org>
Cc: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
---
 drivers/mmc/host/sdhci.c |   22 ++++++++++++++++------
 drivers/mmc/host/sdhci.h |    5 +++++
 2 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 913555e..32dcac9 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -983,7 +983,7 @@ static void sdhci_finish_command(struct sdhci_host *host)
 
 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	int div;
+	int div, max_div;
 	u16 clk;
 	unsigned long timeout;
 
@@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (clock == 0)
 		goto out;
 
-	for (div = 1;div < 256;div *= 2) {
-		if ((host->max_clk / div) <= clock)
-			break;
+	if (host->version >= SDHCI_SPEC_300)
+		max_div = 2046;
+	else
+		max_div = 256;
+
+	if(host->max_clk <= clock)
+		div = 1;
+	else {
+		for (div = 2; div < max_div; div += 2) {
+			if ((host->max_clk / div) <= clock)
+				break;
+		}
 	}
 	div >>= 1;
 
-	clk = div << SDHCI_DIVIDER_SHIFT;
+	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT;
 	clk |= SDHCI_CLOCK_INT_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
@@ -1707,7 +1717,7 @@ int sdhci_add_host(struct sdhci_host *host)
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 	host->version = (host->version & SDHCI_SPEC_VER_MASK)
 				>> SDHCI_SPEC_VER_SHIFT;
-	if (host->version > SDHCI_SPEC_200) {
+	if (host->version > SDHCI_SPEC_300) {
 		printk(KERN_ERR "%s: Unknown controller version (%d). "
 			"You may experience problems.\n", mmc_hostname(mmc),
 			host->version);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 036cfae..50860dc 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -86,6 +86,10 @@
 
 #define SDHCI_CLOCK_CONTROL	0x2C
 #define  SDHCI_DIVIDER_SHIFT	8
+#define  SDHCI_DIVIDER_HI_SHIFT	6
+#define  SDHCI_DIV_MASK	0xFF
+#define  SDHCI_DIV_MASK_LEN	8
+#define  SDHCI_DIV_HI_MASK	0x300
 #define  SDHCI_CLOCK_CARD_EN	0x0004
 #define  SDHCI_CLOCK_INT_STABLE	0x0002
 #define  SDHCI_CLOCK_INT_EN	0x0001
@@ -178,6 +182,7 @@
 #define  SDHCI_SPEC_VER_SHIFT	0
 #define   SDHCI_SPEC_100	0
 #define   SDHCI_SPEC_200	1
+#define   SDHCI_SPEC_300	2
 
 struct sdhci_ops;
 
-- 
1.7.0.4


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-16 13:41 [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0 zhangfei gao
@ 2010-08-16 13:48 ` zhangfei gao
  2010-08-16 16:07 ` David Vrabel
  1 sibling, 0 replies; 10+ messages in thread
From: zhangfei gao @ 2010-08-16 13:48 UTC (permalink / raw)
  To: linux-mmc
  Cc: Anton Vorontsov, Ben Dooks, Wolfram Sang, Matt Fleming,
	Haojian Zhuang, Eric Miao

On Mon, Aug 16, 2010 at 9:41 AM, zhangfei gao <zhangfei.gao@gmail.com> wrote:
> From fd40adef6ce474d5323edcaa833f675b0eb649cb Mon Sep 17 00:00:00 2001
> From: Zhangfei Gao <zgao6@marvell.com>
> Date: Fri, 6 Aug 2010 07:10:01 +0800
> Subject: [PATCH] sdhci: support 10-bit divided clock Mode
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> Cc: Matt Fleming <matt@console-pimps.org>
> Cc: Michał Mirosław <mirqus@gmail.com>
> Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
> ---
>  drivers/mmc/host/sdhci.c |   22 ++++++++++++++++------
>  drivers/mmc/host/sdhci.h |    5 +++++
>  2 files changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 913555e..32dcac9 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -983,7 +983,7 @@ static void sdhci_finish_command(struct sdhci_host *host)
>
>  static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
>  {
> -       int div;
> +       int div, max_div;
>        u16 clk;
>        unsigned long timeout;
>
> @@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host
> *host, unsigned int clock)
>        if (clock == 0)
>                goto out;
>
> -       for (div = 1;div < 256;div *= 2) {
> -               if ((host->max_clk / div) <= clock)
> -                       break;
> +       if (host->version >= SDHCI_SPEC_300)
> +               max_div = 2046;
> +       else
> +               max_div = 256;
> +
> +       if(host->max_clk <= clock)
> +               div = 1;
> +       else {
> +               for (div = 2; div < max_div; div += 2) {
> +                       if ((host->max_clk / div) <= clock)
> +                               break;
> +               }
>        }
>        div >>= 1;
>
> -       clk = div << SDHCI_DIVIDER_SHIFT;
> +       clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
> +       clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) <<
> SDHCI_DIVIDER_HI_SHIFT;
>        clk |= SDHCI_CLOCK_INT_EN;
>        sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
>
> @@ -1707,7 +1717,7 @@ int sdhci_add_host(struct sdhci_host *host)
>        host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
>        host->version = (host->version & SDHCI_SPEC_VER_MASK)
>                                >> SDHCI_SPEC_VER_SHIFT;
> -       if (host->version > SDHCI_SPEC_200) {
> +       if (host->version > SDHCI_SPEC_300) {
>                printk(KERN_ERR "%s: Unknown controller version (%d). "
>                        "You may experience problems.\n", mmc_hostname(mmc),
>                        host->version);
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 036cfae..50860dc 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -86,6 +86,10 @@
>
>  #define SDHCI_CLOCK_CONTROL    0x2C
>  #define  SDHCI_DIVIDER_SHIFT   8
> +#define  SDHCI_DIVIDER_HI_SHIFT        6
> +#define  SDHCI_DIV_MASK        0xFF
> +#define  SDHCI_DIV_MASK_LEN    8
> +#define  SDHCI_DIV_HI_MASK     0x300
>  #define  SDHCI_CLOCK_CARD_EN   0x0004
>  #define  SDHCI_CLOCK_INT_STABLE        0x0002
>  #define  SDHCI_CLOCK_INT_EN    0x0001
> @@ -178,6 +182,7 @@
>  #define  SDHCI_SPEC_VER_SHIFT  0
>  #define   SDHCI_SPEC_100       0
>  #define   SDHCI_SPEC_200       1
> +#define   SDHCI_SPEC_300       2
>
>  struct sdhci_ops;
>
> --
> 1.7.0.4
>

The v2 fix add else condition to v1
 if(host->max_clk <= clock)
               div = 1;
> +       else {

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-16 13:41 [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0 zhangfei gao
  2010-08-16 13:48 ` zhangfei gao
@ 2010-08-16 16:07 ` David Vrabel
  2010-08-16 18:27   ` Matt Fleming
  1 sibling, 1 reply; 10+ messages in thread
From: David Vrabel @ 2010-08-16 16:07 UTC (permalink / raw)
  To: zhangfei gao
  Cc: linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang, Matt Fleming,
	Haojian Zhuang, Eric Miao

zhangfei gao wrote:
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 913555e..32dcac9 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
[...]
> @@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host
> *host, unsigned int clock)
>  	if (clock == 0)
>  		goto out;
> 
> -	for (div = 1;div < 256;div *= 2) {
> -		if ((host->max_clk / div) <= clock)
> -			break;
> +	if (host->version >= SDHCI_SPEC_300)
> +		max_div = 2046;
> +	else
> +		max_div = 256;
> +
> +	if(host->max_clk <= clock)
> +		div = 1;
> +	else {
> +		for (div = 2; div < max_div; div += 2) {
> +			if ((host->max_clk / div) <= clock)
> +				break;
> +		}

This isn't correct.  The divisor must be a power of two for 2.00
controllers.

David
-- 
David Vrabel, Senior Software Engineer, Drivers
CSR, Churchill House, Cambridge Business Park,  Tel: +44 (0)1223 692562
Cowley Road, Cambridge, CB4 0WZ                 http://www.csr.com/


Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-16 16:07 ` David Vrabel
@ 2010-08-16 18:27   ` Matt Fleming
  2010-08-16 18:54     ` David Vrabel
  0 siblings, 1 reply; 10+ messages in thread
From: Matt Fleming @ 2010-08-16 18:27 UTC (permalink / raw)
  To: David Vrabel
  Cc: zhangfei gao, linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang,
	Haojian Zhuang, Eric Miao

On Mon, Aug 16, 2010 at 05:07:15PM +0100, David Vrabel wrote:
> zhangfei gao wrote:
> > 
> > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> > index 913555e..32dcac9 100644
> > --- a/drivers/mmc/host/sdhci.c
> > +++ b/drivers/mmc/host/sdhci.c
> [...]
> > @@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host
> > *host, unsigned int clock)
> >  	if (clock == 0)
> >  		goto out;
> > 
> > -	for (div = 1;div < 256;div *= 2) {
> > -		if ((host->max_clk / div) <= clock)
> > -			break;
> > +	if (host->version >= SDHCI_SPEC_300)
> > +		max_div = 2046;
> > +	else
> > +		max_div = 256;
> > +
> > +	if(host->max_clk <= clock)
> > +		div = 1;
> > +	else {
> > +		for (div = 2; div < max_div; div += 2) {
> > +			if ((host->max_clk / div) <= clock)
> > +				break;
> > +		}
> 
> This isn't correct.  The divisor must be a power of two for 2.00
> controllers.

Sorry, I did mean to reply to this sooner but I've been travelling. Yeah
David, you're right. Zhangfei, have you confused the Programmable Clock
Mode in the 3.00 spec here with 10-bit Divided Clock Mode?

Both 8-bit Divided Clock Mode and 10-bit Divided Clock Mode require the
divisor to be a power of two. Support for Programmable Clock Mode would
require a bit more work because not all clock multiplier values are
valid. Support for that should be done as a separate patch.

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-16 18:27   ` Matt Fleming
@ 2010-08-16 18:54     ` David Vrabel
  2010-08-16 19:27       ` Matt Fleming
  0 siblings, 1 reply; 10+ messages in thread
From: David Vrabel @ 2010-08-16 18:54 UTC (permalink / raw)
  To: Matt Fleming
  Cc: zhangfei gao, linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang,
	Haojian Zhuang, Eric Miao

Matt Fleming wrote:
> On Mon, Aug 16, 2010 at 05:07:15PM +0100, David Vrabel wrote:
>> zhangfei gao wrote:
>>> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
>>> index 913555e..32dcac9 100644
>>> --- a/drivers/mmc/host/sdhci.c
>>> +++ b/drivers/mmc/host/sdhci.c
>> [...]
>>> @@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host
>>> *host, unsigned int clock)
>>>  	if (clock == 0)
>>>  		goto out;
>>>
>>> -	for (div = 1;div < 256;div *= 2) {
>>> -		if ((host->max_clk / div) <= clock)
>>> -			break;
>>> +	if (host->version >= SDHCI_SPEC_300)
>>> +		max_div = 2046;
>>> +	else
>>> +		max_div = 256;
>>> +
>>> +	if(host->max_clk <= clock)
>>> +		div = 1;
>>> +	else {
>>> +		for (div = 2; div < max_div; div += 2) {
>>> +			if ((host->max_clk / div) <= clock)
>>> +				break;
>>> +		}
>> This isn't correct.  The divisor must be a power of two for 2.00
>> controllers.
> 
> Sorry, I did mean to reply to this sooner but I've been travelling. Yeah
> David, you're right. Zhangfei, have you confused the Programmable Clock
> Mode in the 3.00 spec here with 10-bit Divided Clock Mode?
> 
> Both 8-bit Divided Clock Mode and 10-bit Divided Clock Mode require the
> divisor to be a power of two.

The power-of-two requirement only applies to 2.00 controller.  From
section 2.2.14 of the spec.

   "(2) 10-bit Divided Clock Mode
   Host Controller Version 3.00 supports this mandatory mode instead of
   the 8-bit Divided Clock Mode. The length of divider is extended to
   10bits and all divider values shall be supported."

3.00 dividers can be any multiple of two.

David
-- 
David Vrabel, Senior Software Engineer, Drivers
CSR, Churchill House, Cambridge Business Park,  Tel: +44 (0)1223 692562
Cowley Road, Cambridge, CB4 0WZ                 http://www.csr.com/


Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-16 18:54     ` David Vrabel
@ 2010-08-16 19:27       ` Matt Fleming
  2010-08-17 11:08         ` zhangfei gao
  0 siblings, 1 reply; 10+ messages in thread
From: Matt Fleming @ 2010-08-16 19:27 UTC (permalink / raw)
  To: David Vrabel
  Cc: zhangfei gao, linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang,
	Haojian Zhuang, Eric Miao

On Mon, Aug 16, 2010 at 07:54:14PM +0100, David Vrabel wrote:
> Matt Fleming wrote:
> > 
> > Sorry, I did mean to reply to this sooner but I've been travelling. Yeah
> > David, you're right. Zhangfei, have you confused the Programmable Clock
> > Mode in the 3.00 spec here with 10-bit Divided Clock Mode?
> > 
> > Both 8-bit Divided Clock Mode and 10-bit Divided Clock Mode require the
> > divisor to be a power of two.
> 
> The power-of-two requirement only applies to 2.00 controller.  From
> section 2.2.14 of the spec.
> 
>    "(2) 10-bit Divided Clock Mode
>    Host Controller Version 3.00 supports this mandatory mode instead of
>    the 8-bit Divided Clock Mode. The length of divider is extended to
>    10bits and all divider values shall be supported."
> 
> 3.00 dividers can be any multiple of two.

Yep, you're right. I misread the spec. My bad.

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-16 19:27       ` Matt Fleming
@ 2010-08-17 11:08         ` zhangfei gao
  2010-08-17 11:32           ` David Vrabel
                             ` (2 more replies)
  0 siblings, 3 replies; 10+ messages in thread
From: zhangfei gao @ 2010-08-17 11:08 UTC (permalink / raw)
  To: Matt Fleming
  Cc: David Vrabel, linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang,
	Haojian Zhuang, Eric Miao

[-- Attachment #1: Type: text/plain, Size: 3848 bytes --]

On Mon, Aug 16, 2010 at 3:27 PM, Matt Fleming <matt@console-pimps.org> wrote:
> On Mon, Aug 16, 2010 at 07:54:14PM +0100, David Vrabel wrote:
>> Matt Fleming wrote:
>> >
>> > Sorry, I did mean to reply to this sooner but I've been travelling. Yeah
>> > David, you're right. Zhangfei, have you confused the Programmable Clock
>> > Mode in the 3.00 spec here with 10-bit Divided Clock Mode?
>> >
>> > Both 8-bit Divided Clock Mode and 10-bit Divided Clock Mode require the
>> > divisor to be a power of two.
>>
>> The power-of-two requirement only applies to 2.00 controller.  From
>> section 2.2.14 of the spec.
>>
>>    "(2) 10-bit Divided Clock Mode
>>    Host Controller Version 3.00 supports this mandatory mode instead of
>>    the 8-bit Divided Clock Mode. The length of divider is extended to
>>    10bits and all divider values shall be supported."
>>
>> 3.00 dividers can be any multiple of two.
>
> Yep, you're right. I misread the spec. My bad.
>

David

Thanks for your carefully review, my mistake.
update the patch to distinguish spec 2.0 and 3.0, help review again.

>From 9701da8440b847d8e061107fa6d25bd77698e577 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zgao6@marvell.com>
Date: Fri, 6 Aug 2010 07:10:01 +0800
Subject: [PATCH] sdhci: support 10-bit divided clock Mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Cc: Matt Fleming <matt@console-pimps.org>
Cc: Michał Mirosław <mirqus@gmail.com>
Cc: David Vrabel <david.vrabel@csr.com>
Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
---
 drivers/mmc/host/sdhci.c |   22 +++++++++++++++++-----
 drivers/mmc/host/sdhci.h |    5 +++++
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 913555e..7ed6f1c 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1001,13 +1001,25 @@ static void sdhci_set_clock(struct sdhci_host
*host, unsigned int clock)
 	if (clock == 0)
 		goto out;

-	for (div = 1;div < 256;div *= 2) {
-		if ((host->max_clk / div) <= clock)
-			break;
+	if (host->version >= SDHCI_SPEC_300) {
+		if(host->max_clk <= clock)
+			div = 1;
+		else {
+			for (div = 2; div < 2046; div += 2) {
+				if ((host->max_clk / div) <= clock)
+					break;
+			}
+		}
+	} else {
+		for (div = 1;div < 256;div *= 2) {
+			if ((host->max_clk / div) <= clock)
+				break;
+		}
 	}
 	div >>= 1;

-	clk = div << SDHCI_DIVIDER_SHIFT;
+	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) <<
SDHCI_DIVIDER_HI_SHIFT;
 	clk |= SDHCI_CLOCK_INT_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

@@ -1707,7 +1719,7 @@ int sdhci_add_host(struct sdhci_host *host)
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 	host->version = (host->version & SDHCI_SPEC_VER_MASK)
 				>> SDHCI_SPEC_VER_SHIFT;
-	if (host->version > SDHCI_SPEC_200) {
+	if (host->version > SDHCI_SPEC_300) {
 		printk(KERN_ERR "%s: Unknown controller version (%d). "
 			"You may experience problems.\n", mmc_hostname(mmc),
 			host->version);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 036cfae..50860dc 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -86,6 +86,10 @@

 #define SDHCI_CLOCK_CONTROL	0x2C
 #define  SDHCI_DIVIDER_SHIFT	8
+#define  SDHCI_DIVIDER_HI_SHIFT	6
+#define  SDHCI_DIV_MASK	0xFF
+#define  SDHCI_DIV_MASK_LEN	8
+#define  SDHCI_DIV_HI_MASK	0x300
 #define  SDHCI_CLOCK_CARD_EN	0x0004
 #define  SDHCI_CLOCK_INT_STABLE	0x0002
 #define  SDHCI_CLOCK_INT_EN	0x0001
@@ -178,6 +182,7 @@
 #define  SDHCI_SPEC_VER_SHIFT	0
 #define   SDHCI_SPEC_100	0
 #define   SDHCI_SPEC_200	1
+#define   SDHCI_SPEC_300	2

 struct sdhci_ops;

-- 
1.7.0.4

[-- Attachment #2: 0001-sdhci-support-10-bit-divided-clock-Mode.patch --]
[-- Type: text/x-patch, Size: 2659 bytes --]

From 9701da8440b847d8e061107fa6d25bd77698e577 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zgao6@marvell.com>
Date: Fri, 6 Aug 2010 07:10:01 +0800
Subject: [PATCH] sdhci: support 10-bit divided clock Mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Cc: Matt Fleming <matt@console-pimps.org>
Cc: Michał Mirosław <mirqus@gmail.com>
Cc: David Vrabel <david.vrabel@csr.com>
Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
---
 drivers/mmc/host/sdhci.c |   22 +++++++++++++++++-----
 drivers/mmc/host/sdhci.h |    5 +++++
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 913555e..7ed6f1c 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1001,13 +1001,25 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (clock == 0)
 		goto out;
 
-	for (div = 1;div < 256;div *= 2) {
-		if ((host->max_clk / div) <= clock)
-			break;
+	if (host->version >= SDHCI_SPEC_300) {
+		if(host->max_clk <= clock)
+			div = 1;
+		else {
+			for (div = 2; div < 2046; div += 2) {
+				if ((host->max_clk / div) <= clock)
+					break;
+			}
+		}
+	} else {
+		for (div = 1;div < 256;div *= 2) {
+			if ((host->max_clk / div) <= clock)
+				break;
+		}
 	}
 	div >>= 1;
 
-	clk = div << SDHCI_DIVIDER_SHIFT;
+	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT;
 	clk |= SDHCI_CLOCK_INT_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
@@ -1707,7 +1719,7 @@ int sdhci_add_host(struct sdhci_host *host)
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 	host->version = (host->version & SDHCI_SPEC_VER_MASK)
 				>> SDHCI_SPEC_VER_SHIFT;
-	if (host->version > SDHCI_SPEC_200) {
+	if (host->version > SDHCI_SPEC_300) {
 		printk(KERN_ERR "%s: Unknown controller version (%d). "
 			"You may experience problems.\n", mmc_hostname(mmc),
 			host->version);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 036cfae..50860dc 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -86,6 +86,10 @@
 
 #define SDHCI_CLOCK_CONTROL	0x2C
 #define  SDHCI_DIVIDER_SHIFT	8
+#define  SDHCI_DIVIDER_HI_SHIFT	6
+#define  SDHCI_DIV_MASK	0xFF
+#define  SDHCI_DIV_MASK_LEN	8
+#define  SDHCI_DIV_HI_MASK	0x300
 #define  SDHCI_CLOCK_CARD_EN	0x0004
 #define  SDHCI_CLOCK_INT_STABLE	0x0002
 #define  SDHCI_CLOCK_INT_EN	0x0001
@@ -178,6 +182,7 @@
 #define  SDHCI_SPEC_VER_SHIFT	0
 #define   SDHCI_SPEC_100	0
 #define   SDHCI_SPEC_200	1
+#define   SDHCI_SPEC_300	2
 
 struct sdhci_ops;
 
-- 
1.7.0.4


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-17 11:08         ` zhangfei gao
@ 2010-08-17 11:32           ` David Vrabel
  2010-08-17 11:42           ` Matt Fleming
  2010-09-14 13:12           ` Chris Ball
  2 siblings, 0 replies; 10+ messages in thread
From: David Vrabel @ 2010-08-17 11:32 UTC (permalink / raw)
  To: zhangfei gao
  Cc: Matt Fleming, linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang,
	Haojian Zhuang, Eric Miao

zhangfei gao wrote:
> 
> Thanks for your carefully review, my mistake.
> update the patch to distinguish spec 2.0 and 3.0, help review again.

This looks ok now.

David
-- 
David Vrabel, Senior Software Engineer, Drivers
CSR, Churchill House, Cambridge Business Park,  Tel: +44 (0)1223 692562
Cowley Road, Cambridge, CB4 0WZ                 http://www.csr.com/


Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-17 11:08         ` zhangfei gao
  2010-08-17 11:32           ` David Vrabel
@ 2010-08-17 11:42           ` Matt Fleming
  2010-09-14 13:12           ` Chris Ball
  2 siblings, 0 replies; 10+ messages in thread
From: Matt Fleming @ 2010-08-17 11:42 UTC (permalink / raw)
  To: zhangfei gao
  Cc: David Vrabel, linux-mmc, Anton Vorontsov, Ben Dooks, Wolfram Sang,
	Haojian Zhuang, Eric Miao

On Tue, Aug 17, 2010 at 07:08:57AM -0400, zhangfei gao wrote:
> 
> Thanks for your carefully review, my mistake.
> update the patch to distinguish spec 2.0 and 3.0, help review again.
> 
> From 9701da8440b847d8e061107fa6d25bd77698e577 Mon Sep 17 00:00:00 2001
> From: Zhangfei Gao <zgao6@marvell.com>
> Date: Fri, 6 Aug 2010 07:10:01 +0800
> Subject: [PATCH] sdhci: support 10-bit divided clock Mode
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
> 
> Cc: Matt Fleming <matt@console-pimps.org>
> Cc: Micha? Miros?aw <mirqus@gmail.com>
> Cc: David Vrabel <david.vrabel@csr.com>
> Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
> ---
>  drivers/mmc/host/sdhci.c |   22 +++++++++++++++++-----
>  drivers/mmc/host/sdhci.h |    5 +++++
>  2 files changed, 22 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 913555e..7ed6f1c 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1001,13 +1001,25 @@ static void sdhci_set_clock(struct sdhci_host
> *host, unsigned int clock)
>  	if (clock == 0)
>  		goto out;
> 
> -	for (div = 1;div < 256;div *= 2) {
> -		if ((host->max_clk / div) <= clock)
> -			break;
> +	if (host->version >= SDHCI_SPEC_300) {
> +		if(host->max_clk <= clock)
> +			div = 1;
> +		else {
> +			for (div = 2; div < 2046; div += 2) {
> +				if ((host->max_clk / div) <= clock)
> +					break;
> +			}
> +		}
> +	} else {
> +		for (div = 1;div < 256;div *= 2) {
> +			if ((host->max_clk / div) <= clock)
> +				break;
> +		}
>  	}
>  	div >>= 1;
> 
> -	clk = div << SDHCI_DIVIDER_SHIFT;
> +	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
> +	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) <<
> SDHCI_DIVIDER_HI_SHIFT;
>  	clk |= SDHCI_CLOCK_INT_EN;
>  	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> 
> @@ -1707,7 +1719,7 @@ int sdhci_add_host(struct sdhci_host *host)
>  	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
>  	host->version = (host->version & SDHCI_SPEC_VER_MASK)
>  				>> SDHCI_SPEC_VER_SHIFT;
> -	if (host->version > SDHCI_SPEC_200) {
> +	if (host->version > SDHCI_SPEC_300) {
>  		printk(KERN_ERR "%s: Unknown controller version (%d). "
>  			"You may experience problems.\n", mmc_hostname(mmc),
>  			host->version);
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 036cfae..50860dc 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -86,6 +86,10 @@
> 
>  #define SDHCI_CLOCK_CONTROL	0x2C
>  #define  SDHCI_DIVIDER_SHIFT	8
> +#define  SDHCI_DIVIDER_HI_SHIFT	6
> +#define  SDHCI_DIV_MASK	0xFF
> +#define  SDHCI_DIV_MASK_LEN	8
> +#define  SDHCI_DIV_HI_MASK	0x300
>  #define  SDHCI_CLOCK_CARD_EN	0x0004
>  #define  SDHCI_CLOCK_INT_STABLE	0x0002
>  #define  SDHCI_CLOCK_INT_EN	0x0001
> @@ -178,6 +182,7 @@
>  #define  SDHCI_SPEC_VER_SHIFT	0
>  #define   SDHCI_SPEC_100	0
>  #define   SDHCI_SPEC_200	1
> +#define   SDHCI_SPEC_300	2
> 
>  struct sdhci_ops;
> 
> -- 
> 1.7.0.4

> From 9701da8440b847d8e061107fa6d25bd77698e577 Mon Sep 17 00:00:00 2001
> From: Zhangfei Gao <zgao6@marvell.com>
> Date: Fri, 6 Aug 2010 07:10:01 +0800
> Subject: [PATCH] sdhci: support 10-bit divided clock Mode
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
> 
> Cc: Matt Fleming <matt@console-pimps.org>
> Cc: Micha?? Miros??aw <mirqus@gmail.com>
> Cc: David Vrabel <david.vrabel@csr.com>
> Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
> ---
>  drivers/mmc/host/sdhci.c |   22 +++++++++++++++++-----
>  drivers/mmc/host/sdhci.h |    5 +++++
>  2 files changed, 22 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 913555e..7ed6f1c 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1001,13 +1001,25 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
>  	if (clock == 0)
>  		goto out;
>  
> -	for (div = 1;div < 256;div *= 2) {
> -		if ((host->max_clk / div) <= clock)
> -			break;
> +	if (host->version >= SDHCI_SPEC_300) {
> +		if(host->max_clk <= clock)
> +			div = 1;
> +		else {
> +			for (div = 2; div < 2046; div += 2) {
> +				if ((host->max_clk / div) <= clock)
> +					break;
> +			}
> +		}
> +	} else {
> +		for (div = 1;div < 256;div *= 2) {
> +			if ((host->max_clk / div) <= clock)
> +				break;
> +		}
>  	}
>  	div >>= 1;
>  
> -	clk = div << SDHCI_DIVIDER_SHIFT;
> +	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
> +	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT;
>  	clk |= SDHCI_CLOCK_INT_EN;
>  	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
>  
> @@ -1707,7 +1719,7 @@ int sdhci_add_host(struct sdhci_host *host)
>  	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
>  	host->version = (host->version & SDHCI_SPEC_VER_MASK)
>  				>> SDHCI_SPEC_VER_SHIFT;
> -	if (host->version > SDHCI_SPEC_200) {
> +	if (host->version > SDHCI_SPEC_300) {
>  		printk(KERN_ERR "%s: Unknown controller version (%d). "
>  			"You may experience problems.\n", mmc_hostname(mmc),
>  			host->version);
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 036cfae..50860dc 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -86,6 +86,10 @@
>  
>  #define SDHCI_CLOCK_CONTROL	0x2C
>  #define  SDHCI_DIVIDER_SHIFT	8
> +#define  SDHCI_DIVIDER_HI_SHIFT	6
> +#define  SDHCI_DIV_MASK	0xFF
> +#define  SDHCI_DIV_MASK_LEN	8
> +#define  SDHCI_DIV_HI_MASK	0x300
>  #define  SDHCI_CLOCK_CARD_EN	0x0004
>  #define  SDHCI_CLOCK_INT_STABLE	0x0002
>  #define  SDHCI_CLOCK_INT_EN	0x0001
> @@ -178,6 +182,7 @@
>  #define  SDHCI_SPEC_VER_SHIFT	0
>  #define   SDHCI_SPEC_100	0
>  #define   SDHCI_SPEC_200	1
> +#define   SDHCI_SPEC_300	2
>  
>  struct sdhci_ops;
>  
> -- 
> 1.7.0.4
>

Reviewed-by: Matt Fleming <matt@console-pimps.org>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0
  2010-08-17 11:08         ` zhangfei gao
  2010-08-17 11:32           ` David Vrabel
  2010-08-17 11:42           ` Matt Fleming
@ 2010-09-14 13:12           ` Chris Ball
  2 siblings, 0 replies; 10+ messages in thread
From: Chris Ball @ 2010-09-14 13:12 UTC (permalink / raw)
  To: zhangfei gao; +Cc: Matt Fleming, David Vrabel, linux-mmc

Hi,

On Tue, Aug 17, 2010 at 07:08:57AM -0400, zhangfei gao wrote:
> From: Zhangfei Gao <zgao6@marvell.com>
> Date: Fri, 6 Aug 2010 07:10:01 +0800
> Subject: [PATCH] sdhci: support 10-bit divided clock Mode

Thanks, applied to mmc-next with minor cleanup.

-- 
Chris Ball   <cjb@laptop.org>   <http://printf.net/>
One Laptop Per Child

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2010-09-14 13:12 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-08-16 13:41 [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0 zhangfei gao
2010-08-16 13:48 ` zhangfei gao
2010-08-16 16:07 ` David Vrabel
2010-08-16 18:27   ` Matt Fleming
2010-08-16 18:54     ` David Vrabel
2010-08-16 19:27       ` Matt Fleming
2010-08-17 11:08         ` zhangfei gao
2010-08-17 11:32           ` David Vrabel
2010-08-17 11:42           ` Matt Fleming
2010-09-14 13:12           ` Chris Ball

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