From mboxrd@z Thu Jan  1 00:00:00 1970
From: Wolfram Sang <w.sang@pengutronix.de>
Subject: Re: [patch 1/1] sdhci-base-clock-freqency-change-in-spec-3.0
Date: Wed, 15 Sep 2010 12:10:19 +0200
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On Wed, Sep 15, 2010 at 11:35:18AM +0800, zhangfei gao wrote:

> > Is the 8-bit support really according to the standard? I wonder because
> > the bit currently used by sdhci.c is marked as "reserved/new assignment
> > now allowed" in the simplified v2.0 spec.
>=20
> Attached capacity in sdh 3.0.
> 6-bit base clock frequece is support in 1.0 and 2.0, support 10M to 63M.
> 8-bit is supported in 3.0, and support 10M to 255M.

I meant 8-bit bus width. Which bit in which register selects this?

--=20
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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