Re: [PATCH] OMAP4: HSMMC cmd line reset change

[Chris Ball <cjb@laptop.org>]

Hi Madhu,

On Thu, Sep 16, 2010 at 05:28:11AM +0530, Madhusudhan Chikkature wrote:
> OMAP4: HSMMC cmd line reset change

Please don't repeat the subject line like this -- "git am" will put it
into the patch twice.  You can either leave the subject line out of the
body of the mail altogether, or put "Subject: " in front of it.

> The cmd line reset logic is changed in OMAP4 ES2. The new procedure
> is to monitor a 0->1 transition and then 1->0 transition.The earlier
> logic would fail on ES2 chips because the loop could exit even before
> the reset is actually complete.
> 
> Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
> ---
>  drivers/mmc/host/omap_hsmmc.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index 4526d27..750ba7d 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -976,12 +976,19 @@ static inline void omap_hsmmc_reset_controller_fsm(struct
> omap_hsmmc_host *host,

(This was line-wrapped, I fixed it.)

>  						   unsigned long bit)
>  {
>  	unsigned long i = 0;
> +	unsigned long j = 0;
>  	unsigned long limit = (loops_per_jiffy *
>  				msecs_to_jiffies(MMC_TIMEOUT_MS));
> 
>  	OMAP_HSMMC_WRITE(host->base, SYSCTL,
>  			 OMAP_HSMMC_READ(host->base, SYSCTL) | bit);
> 
> +	if (cpu_is_omap44xx() && bit == SRC) {
> +		while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit))
> +				&& (j++ < limit))
> +			cpu_relax();
> +	}
> +
>  	while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) &&
>  		(i++ < limit))
>  		cpu_relax();
> -- 
> 1.7.0.4

Thanks, pushed to mmc-next.

-- 
Chris Ball   <cjb@laptop.org>   <http://printf.net/>
One Laptop Per Child