From: Wolfram Sang <w.sang@pengutronix.de>
To: Zhu Richard-R65037 <R65037@freescale.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
"cjb@laptop.org" <cjb@laptop.org>,
"avorontsov@ru.mvista.com" <avorontsov@ru.mvista.com>,
"eric@eukrea.com" <eric@eukrea.com>,
"linuxzsc@gmail.com" <linuxzsc@gmail.com>,
Zhao Richard-B20223 <B20223@freescale.com>,
"Freescale@lists.linaro.org" <Freescale@lists.linaro.org>,
"eric.miao@linaro.org" <eric.miao@linaro.org>
Subject: Re: [PATCH V3 4/4] mmc: sdhci-esdhc: enable esdhc on imx53
Date: Thu, 3 Mar 2011 11:49:02 +0100 [thread overview]
Message-ID: <20110303104902.GE3649@pengutronix.de> (raw)
In-Reply-To: <010C9052C42A00499CE76D637FA5EE900C82A4@039-SN1MPN1-001.039d.mgd.msft.net>
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> > > > > +/* Abort type definition in the command register */
> > > > > +#define SDHCI_CMD_ABORTCMD 0xC0
> > > >
> > > > Won't that belong into sd.h (unless I misunderstood your last mail)?
> > > This is the bit definitions of the ABORTCMD CMD-TYPE on the bit6~7 of
> > CMD register.
> > > Here is the definition of the CMD register derived from SDHC spec. FYI.
> > > D15 D14 D13 D08 D07 D06 D05 D04
> > D03 D02 D01 D00
> > > Rsvd Command Index Command Type Data Present Select Command Index
> > Check Enable Command CRC Check Enable Rsvd Response Type Select
> >
> > Ack, I found that, too. Exactly because it is in the standard, I thought
> > this should rather go into sd.h than sdhci-esdhc-imx.c. Would be a
> > seperate patch, though.
> >
> Do you means the sdhci.h file?
> I find that the sd.h file doesn't contain the bit definitions stuff of SD HOST CONTROLLER registers.
> The sdhci.h file has them, such as:
> #define SDHCI_COMMAND 0x0E
> #define SDHCI_CMD_RESP_MASK 0x03
> #define SDHCI_CMD_CRC 0x08
> #define SDHCI_CMD_INDEX 0x10
> #define SDHCI_CMD_DATA 0x20
My idea was that it belongs more to the command definitions, thus sd.h.
But as long as there is nothing to be solved at core-level sdhci.h might
do for now as well.
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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next prev parent reply other threads:[~2011-03-03 10:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-28 11:32 [PATCH V3 1/4] ARM: imx53_loco: add esdhc device support Richard Zhu
2011-02-28 11:32 ` [PATCH V3 2/4] ARM: imx51/53: add sdhc3/4 clock Richard Zhu
2011-02-28 11:32 ` [PATCH V3 3/4] mmc: sdhci-esdhc: remove SDHCI_QUIRK_NO_CARD_NO_RESET from ESDHC_DEFAULT_QUIRKS Richard Zhu
2011-02-28 14:20 ` Wolfram Sang
2011-03-01 1:25 ` Zhu Richard-R65037
2011-02-28 11:32 ` [PATCH V3 4/4] mmc: sdhci-esdhc: enable esdhc on imx53 Richard Zhu
2011-02-28 14:47 ` Wolfram Sang
2011-03-01 1:51 ` Zhu Richard-R65037
2011-03-01 3:06 ` Eric Miao
2011-03-01 11:31 ` Wolfram Sang
2011-03-02 5:37 ` Zhu Richard-R65037
2011-03-03 10:49 ` Wolfram Sang [this message]
2011-02-28 11:39 ` [PATCH V3 1/4] ARM: imx53_loco: add esdhc device support Zhu Richard-R65037
2011-02-28 13:58 ` Wolfram Sang
-- strict thread matches above, loose matches on Subject: below --
2011-02-28 11:25 Richard Zhu
2011-02-28 11:25 ` [PATCH V3 4/4] mmc: sdhci-esdhc: enable esdhc on imx53 Richard Zhu
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