[PATCH 0/5] arm: davinci: DA850: wl12xx expansion board

[PATCH 0/5] arm: davinci: DA850: wl12xx expansion board

[Ido Yariv]

The following series adds support for an optional wl12xx based expansion
board for the DA850:
http://processors.wiki.ti.com/index.php/AM18x_%2B_WL1271

The first couple of patches address issues which had to be fixed for
this series to work. However, these should be fixed regardless of the
DA850 expansion board support, and could influence other Davinci
platforms.

Only the Wi-Fi functionality of the expansion board is supported.
Bluetooth functionality is not yet supported.

The patches are based on v3.0-rc6.

Ido.

Ido Yariv (5):
  arm: davinci: Fix low level gpio irq handlers' argument
  arm: davinci: Allow EVENTQ_0 as a default queue
  arm: davinci: DA850: Set a default queue for CC1
  arm: davinci: mmc: Add support for set_power callback
  arm: davinci: DA850: Add wl12xx expansion board support

 arch/arm/mach-davinci/Kconfig             |   31 +++++++
 arch/arm/mach-davinci/board-da850-evm.c   |  128 +++++++++++++++++++++++++++++
 arch/arm/mach-davinci/da850.c             |    9 ++
 arch/arm/mach-davinci/devices-da8xx.c     |    3 +
 arch/arm/mach-davinci/dm365.c             |    4 +-
 arch/arm/mach-davinci/dma.c               |    5 +-
 arch/arm/mach-davinci/gpio.c              |   16 +++-
 arch/arm/mach-davinci/include/mach/edma.h |    2 +-
 arch/arm/mach-davinci/include/mach/mmc.h  |    3 +
 arch/arm/mach-davinci/include/mach/mux.h  |   10 ++
 drivers/mmc/host/davinci_mmc.c            |   13 +++
 11 files changed, 216 insertions(+), 8 deletions(-)

-- 
1.7.4.1

[PATCH 1/5] arm: davinci: Fix low level gpio irq handlers' argument

[Ido Yariv]

Commit 7416401 ("arm: davinci: Fix fallout from generic irq chip
conversion") introduced a bug, causing low level interrupt handlers to
get a bogus irq number as an argument. The gpio irq handler falsely
assumes that the handler data is the irq base number and that is no
longer true.

Fix this by converting gpio_irq_handler's bank_irq argument to the
corresponding irq base number.

Signed-off-by: Ido Yariv <ido@wizery.com>
CC: Thomas Gleixner <tglx@linutronix.de>
---
 arch/arm/mach-davinci/gpio.c |   16 ++++++++++++----
 1 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index e722139..db6355a 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -249,8 +249,16 @@ static struct irq_chip gpio_irqchip = {
 	.flags		= IRQCHIP_SET_TYPE_MASKED,
 };
 
+static unsigned int first_irq_in_bankirq(unsigned int bank_irq)
+{
+	struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+	/* Each irq bank consists of up to 16 irqs */
+	return gpio_to_irq(0) + (16 * (bank_irq - soc_info->gpio_irq));
+}
+
 static void
-gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+gpio_irq_handler(unsigned bank_irq, struct irq_desc *desc)
 {
 	struct davinci_gpio_regs __iomem *g;
 	u32 mask = 0xffff;
@@ -258,7 +266,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 	g = (__force struct davinci_gpio_regs __iomem *) irq_desc_get_handler_data(desc);
 
 	/* we only care about one bank */
-	if (irq & 1)
+	if (bank_irq & 1)
 		mask <<= 16;
 
 	/* temporarily mask (level sensitive) parent IRQ */
@@ -274,11 +282,11 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 		if (!status)
 			break;
 		__raw_writel(status, &g->intstat);
-		if (irq & 1)
+		if (bank_irq & 1)
 			status >>= 16;
 
 		/* now demux them to the right lowlevel handler */
-		n = (int)irq_get_handler_data(irq);
+		n = first_irq_in_bankirq(bank_irq);
 		while (status) {
 			res = ffs(status);
 			n += res;
-- 
1.7.4.1

[PATCH 2/5] arm: davinci: Allow EVENTQ_0 as a default queue

[Ido Yariv]

Davinci platforms may define a default queue for each channel
controller. If one is not defined, the default queue is set to EVENTQ_1.
However, there's no way to distinguish between an unset default queue to
one that is set to EVENTQ_0, as EVENTQ_0 = 0.

In order to keep existing behaviour on platforms which don't specify a
default_queue member, the default_queue member was modified to be a
pointer to enum dma_event_q. A NULL value means that this member was not
specified.

Signed-off-by: Ido Yariv <ido@wizery.com>
---
 arch/arm/mach-davinci/dm365.c             |    4 +++-
 arch/arm/mach-davinci/dma.c               |    5 +++--
 arch/arm/mach-davinci/include/mach/edma.h |    2 +-
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 4604e72..b1cf08e 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -827,6 +827,8 @@ dm365_queue_priority_mapping[][2] = {
 	{-1, -1},
 };
 
+static enum dma_event_q dm365_edma_cc0_default_queue = EVENTQ_3;
+
 static struct edma_soc_info edma_cc0_info = {
 	.n_channel		= 64,
 	.n_region		= 4,
@@ -835,7 +837,7 @@ static struct edma_soc_info edma_cc0_info = {
 	.n_cc			= 1,
 	.queue_tc_mapping	= dm365_queue_tc_mapping,
 	.queue_priority_mapping	= dm365_queue_priority_mapping,
-	.default_queue		= EVENTQ_3,
+	.default_queue_ptr	= &dm365_edma_cc0_default_queue,
 };
 
 static struct edma_soc_info *dm365_edma_info[EDMA_MAX_CC] = {
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 6b96698..11c71e7 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -1449,8 +1449,9 @@ static int __init edma_probe(struct platform_device *pdev)
 		edma_cc[j]->num_cc = min_t(unsigned, info[j]->n_cc,
 							EDMA_MAX_CC);
 
-		edma_cc[j]->default_queue = info[j]->default_queue;
-		if (!edma_cc[j]->default_queue)
+		if (info[j]->default_queue_ptr)
+			edma_cc[j]->default_queue = *info[j]->default_queue_ptr;
+		else
 			edma_cc[j]->default_queue = EVENTQ_1;
 
 		dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 20c77f2..7f81812 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -250,7 +250,7 @@ struct edma_soc_info {
 	unsigned	n_slot;
 	unsigned	n_tc;
 	unsigned	n_cc;
-	enum dma_event_q	default_queue;
+	enum dma_event_q	*default_queue_ptr;
 
 	/* Resource reservation for other cores */
 	struct edma_rsv_info	*rsv;
-- 
1.7.4.1

Re: [PATCH 2/5] arm: davinci: Allow EVENTQ_0 as a default queue

[Sergei Shtylyov]

Hello.

On 08-07-2011 1:33, Ido Yariv wrote:

> Davinci platforms may define a default queue for each channel
> controller. If one is not defined, the default queue is set to EVENTQ_1.
> However, there's no way to distinguish between an unset default queue to
> one that is set to EVENTQ_0, as EVENTQ_0 = 0.

> In order to keep existing behaviour on platforms which don't specify a
> default_queue member, the default_queue member was modified to be a
> pointer to enum dma_event_q. A NULL value means that this member was not
> specified.

    Mmm, perhaps it's better to drop the default EVENTQ_1 concept and 
explicitly initilaize that field for every SoC. It's also possible to offset 
the event queue number by 1. I don't like the pointer solution.

> Signed-off-by: Ido Yariv<ido@wizery.com>

WBR, Sergei

Re: [PATCH 2/5] arm: davinci: Allow EVENTQ_0 as a default queue

[Ido Yariv]

Hi,

On Fri, Jul 08, 2011 at 02:25:23PM +0400, Sergei Shtylyov wrote:
> On 08-07-2011 1:33, Ido Yariv wrote:
> 
> >Davinci platforms may define a default queue for each channel
> >controller. If one is not defined, the default queue is set to EVENTQ_1.
> >However, there's no way to distinguish between an unset default queue to
> >one that is set to EVENTQ_0, as EVENTQ_0 = 0.
> 
> >In order to keep existing behaviour on platforms which don't specify a
> >default_queue member, the default_queue member was modified to be a
> >pointer to enum dma_event_q. A NULL value means that this member was not
> >specified.
> 
>    Mmm, perhaps it's better to drop the default EVENTQ_1 concept and
> explicitly initilaize that field for every SoC. It's also possible
> to offset the event queue number by 1. I don't like the pointer
> solution.

Dropping the default EVENTQ_1 is probably the best solution, but doing
so has the potential of breaking some Davinci platforms (not currently
in mainline) which don't specify this member.

The second option was also considered - modifying the dma_event_q enum,
incrementing all EVENTQ_X constants, and decrementing the value back in
map_dmach_queue. This approach has two minor drawbacks:

* There are other users of this enum, besides the default queue.
  However, AFAIK, there's only one function (map_dmach_queue) that
  actually cares about the numerical values.
* If someone currently defines a queue numerically, this code could
  break. Obviously, defining a queue numerically is not something that
  should be done.

If there aren't any objections, we could go for the first option.

Thanks for your review,
Ido.

[PATCH 3/5] arm: davinci: DA850: Set a default queue for CC1

[Ido Yariv]

If a default queue is not set for a channel controller, EVENTQ_1 is
used. The second channel controller has only one event queue, and so,
EVENTQ_1 is an invalid option.

Fix this by explicitly setting the default queue for CC1 to be EVENTQ_0.

Signed-off-by: Ido Yariv <ido@wizery.com>
---
 arch/arm/mach-davinci/devices-da8xx.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index fc4e98e..74114c0 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -139,6 +139,8 @@ static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
 	&da830_edma_cc0_info,
 };
 
+static enum dma_event_q da850_edma_cc1_default_queue = EVENTQ_0;
+
 static struct edma_soc_info da850_edma_cc_info[] = {
 	{
 		.n_channel		= 32,
@@ -157,6 +159,7 @@ static struct edma_soc_info da850_edma_cc_info[] = {
 		.n_cc			= 1,
 		.queue_tc_mapping	= da850_queue_tc_mapping,
 		.queue_priority_mapping	= da850_queue_priority_mapping,
+		.default_queue_ptr	= &da850_edma_cc1_default_queue,
 	},
 };
 
-- 
1.7.4.1

[PATCH 4/5] arm: davinci: mmc: Add support for set_power callback

[Ido Yariv]

Some devices connected to the MMC bus are power controlled by external
means. For instance, an SDIO device may be powered down/up by an
external gpio line.

In order to avoid toggling power from within the MMC host driver, add a
set_power callback function, which will be called by set_ios upon
powering down/up.

Signed-off-by: Ido Yariv <ido@wizery.com>
---
 arch/arm/mach-davinci/include/mach/mmc.h |    3 +++
 drivers/mmc/host/davinci_mmc.c           |   13 +++++++++++++
 2 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/mmc.h b/arch/arm/mach-davinci/include/mach/mmc.h
index d4f1e96..5ba6b22 100644
--- a/arch/arm/mach-davinci/include/mach/mmc.h
+++ b/arch/arm/mach-davinci/include/mach/mmc.h
@@ -12,6 +12,9 @@ struct davinci_mmc_config {
 	/* get_cd()/get_wp() may sleep */
 	int	(*get_cd)(int module);
 	int	(*get_ro)(int module);
+
+	void	(*set_power)(int module, bool on);
+
 	/* wires == 0 is equivalent to wires == 4 (4-bit parallel) */
 	u8	wires;
 
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 0076c74..64a8325 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -807,12 +807,25 @@ static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios)
 static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 {
 	struct mmc_davinci_host *host = mmc_priv(mmc);
+	struct platform_device *pdev = to_platform_device(mmc->parent);
+	struct davinci_mmc_config *config = pdev->dev.platform_data;
 
 	dev_dbg(mmc_dev(host->mmc),
 		"clock %dHz busmode %d powermode %d Vdd %04x\n",
 		ios->clock, ios->bus_mode, ios->power_mode,
 		ios->vdd);
 
+	switch (ios->power_mode) {
+	case MMC_POWER_OFF:
+		if (config && config->set_power)
+			config->set_power(pdev->id, false);
+		break;
+	case MMC_POWER_UP:
+		if (config && config->set_power)
+			config->set_power(pdev->id, true);
+		break;
+	}
+
 	switch (ios->bus_width) {
 	case MMC_BUS_WIDTH_8:
 		dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n");
-- 
1.7.4.1

[PATCH 5/5] arm: davinci: DA850: Add wl12xx expansion board support

[Ido Yariv]

The DA850 supports an optional wl12xx based expansion board, adding WLAN
& BT capabilities. The wl12xx is a 4-wire, 1.8V, embedded SDIO WLAN
device with an external IRQ line and is power-controlled by a GPIO-based
fixed regulator.

This patch adds support for the WLAN capabilities of this expansion
board.

Signed-off-by: Ido Yariv <ido@wizery.com>
---
 arch/arm/mach-davinci/Kconfig            |   31 +++++++
 arch/arm/mach-davinci/board-da850-evm.c  |  128 ++++++++++++++++++++++++++++++
 arch/arm/mach-davinci/da850.c            |    9 ++
 arch/arm/mach-davinci/include/mach/mux.h |   10 +++
 4 files changed, 178 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index c0deaca..1a9149c 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -192,6 +192,37 @@ config DA850_UI_RMII
 
 endchoice
 
+config DA850_WL12XX
+	bool "DA850 wl12xx expansion board"
+	depends on MACH_DAVINCI_DA850_EVM
+	---help---
+	  Say Y if you want to use a wl12xx expansion board connected to the
+	  DA850 EVM.
+
+choice
+	prompt "FREF reference clock used by the wl12XX expansion board"
+	default DA850_WL12XX_FREF_38_4
+	depends on DA850_WL12XX
+	help
+	  There are currently two kinds of such daughter boards, one made by
+	  Mistral and another by LS Research. These (and perhaps others) use
+	  different FREF reference clocks. Select the correct one according to
+	  the daughter board's type.
+
+config DA850_WL12XX_FREF_19_2
+	bool "19.2MHz"
+config DA850_WL12XX_FREF_26
+	bool "26MHz"
+config DA850_WL12XX_FREF_38_4
+	bool "38.4MHz"
+config DA850_WL12XX_FREF_52
+	bool "52MHz"
+config DA850_WL12XX_FREF_XTAL_26
+	bool "XTAL 26MHz"
+config DA850_WL12XX_FREF_XTAL_38_4
+	bool "XTAL 38MHz"
+endchoice
+
 config GPIO_PCA953X
 	default MACH_DAVINCI_DA850_EVM
 
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index a7b41bf..a567379 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -31,6 +31,8 @@
 #include <linux/input/tps6507x-ts.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#include <linux/delay.h>
+#include <linux/wl12xx.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -49,6 +51,9 @@
 #define DA850_MMCSD_CD_PIN		GPIO_TO_PIN(4, 0)
 #define DA850_MMCSD_WP_PIN		GPIO_TO_PIN(4, 1)
 
+#define DA850_WLAN_EN			GPIO_TO_PIN(6, 9)
+#define DA850_WLAN_IRQ			GPIO_TO_PIN(6, 10)
+
 #define DA850_MII_MDIO_CLKEN_PIN	GPIO_TO_PIN(2, 6)
 
 static struct mtd_partition da850evm_spiflash_part[] = {
@@ -1117,6 +1122,127 @@ static __init int da850_evm_init_cpufreq(void)
 static __init int da850_evm_init_cpufreq(void) { return 0; }
 #endif
 
+#ifdef CONFIG_DA850_WL12XX
+
+static int da850_wl12xx_fref = -1;
+
+static int __init setup_da850_wl12xx_fref(char *fref)
+{
+	if (!strcmp(fref, "19.2"))
+		da850_wl12xx_fref = WL12XX_REFCLOCK_19;
+	else if (!strcmp(fref, "26"))
+		da850_wl12xx_fref = WL12XX_REFCLOCK_26;
+	else if (!strcmp(fref, "38.4"))
+		da850_wl12xx_fref = WL12XX_REFCLOCK_38;
+	else if (!strcmp(fref, "52"))
+		da850_wl12xx_fref = WL12XX_REFCLOCK_52;
+	else if (!strcmp(fref, "XTAL26"))
+		da850_wl12xx_fref = WL12XX_REFCLOCK_26_XTAL;
+	else if (!strcmp(fref, "XTAL38.4"))
+		da850_wl12xx_fref = WL12XX_REFCLOCK_38_XTAL;
+	else
+		pr_info("da850_wl12xx_fref is invalid. Valid options: "
+			"19.2, 26, 38.4, 52, XTAL26 or XTAL38.4\n");
+	return 0;
+}
+__setup("da850_wl12xx_fref=", setup_da850_wl12xx_fref);
+
+static void wl12xx_set_power(int slot, bool power_on)
+{
+	static bool power_state;
+
+	pr_debug("Powering %s wl12xx", (power_on ? "on" : "off"));
+
+	if (power_on == power_state)
+		return;
+	power_state = power_on;
+
+	if (power_on) {
+		/* Power up sequence required for wl127x devices */
+		gpio_set_value(DA850_WLAN_EN, 1);
+		mdelay(15);
+		gpio_set_value(DA850_WLAN_EN, 0);
+		mdelay(1);
+		gpio_set_value(DA850_WLAN_EN, 1);
+		mdelay(70);
+	} else {
+		gpio_set_value(DA850_WLAN_EN, 0);
+	}
+}
+
+static struct davinci_mmc_config da850_mmc_wl12xx_config = {
+	.get_ro		= NULL,
+	.get_cd		= NULL,
+	.set_power	= wl12xx_set_power,
+	.wires		= 4,
+	.max_freq	= 25000000,
+	.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
+			  MMC_CAP_POWER_OFF_CARD,
+	.version	= MMC_CTLR_VERSION_2,
+};
+
+static const short da850_evm_mmc_wl12xx_pins[] __initconst = {
+	DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
+	DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
+	DA850_GPIO6_9, DA850_GPIO6_10,
+	-1
+};
+
+static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
+	.irq			= -1,
+#ifdef CONFIG_DA850_WL12XX_FREF_19_2
+	.board_ref_clock	= WL12XX_REFCLOCK_19,
+#elif defined CONFIG_DA850_WL12XX_FREF_26
+	.board_ref_clock	= WL12XX_REFCLOCK_26,
+#elif defined CONFIG_DA850_WL12XX_FREF_38_4
+	.board_ref_clock	= WL12XX_REFCLOCK_38,
+#elif defined CONFIG_DA850_WL12XX_FREF_52
+	.board_ref_clock	= WL12XX_REFCLOCK_52,
+#elif defined CONFIG_DA850_WL12XX_FREF_XTAL_26
+	.board_ref_clock	= WL12XX_REFCLOCK_26_XTAL,
+#elif defined CONFIG_DA850_WL12XX_FREF_XTAL_38_4
+	.board_ref_clock	= WL12XX_REFCLOCK_38_XTAL,
+#endif
+	.platform_quirks	= WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
+};
+
+static void da850_wl12xx_init(void)
+{
+	int ret;
+
+	ret = davinci_cfg_reg_list(da850_evm_mmc_wl12xx_pins);
+	if (ret)
+		pr_warning("da850_evm_init: wl12xx/mmc mux setup failed:"
+			   " %d\n", ret);
+
+	ret = da850_register_mmcsd1(&da850_mmc_wl12xx_config);
+	if (ret)
+		pr_warning("da850_evm_init: wl12xx/mmc registration failed:"
+			   " %d\n", ret);
+
+	if (gpio_request(DA850_WLAN_EN, "wl12xx_en") ||
+	    gpio_direction_output(DA850_WLAN_EN, 0))
+		pr_err("Error initializing the wl12xx enable gpio\n");
+
+	if (gpio_request(DA850_WLAN_IRQ, "wl12xx_irq") ||
+	    gpio_direction_input(DA850_WLAN_IRQ))
+		pr_err("Error initializing the wl12xx irq gpio\n");
+	else
+		da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
+
+	if (da850_wl12xx_fref != -1)
+		da850_wl12xx_wlan_data.board_ref_clock = da850_wl12xx_fref;
+
+	if (wl12xx_set_platform_data(&da850_wl12xx_wlan_data))
+		pr_err("Error setting wl12xx data\n");
+}
+
+#else /* CONFIG_DA850_WL12XX */
+
+static void da850_wl12xx_init(void) { }
+
+#endif /* CONFIG_DA850_WL12XX */
+
 static __init void da850_evm_init(void)
 {
 	int ret;
@@ -1169,6 +1295,8 @@ static __init void da850_evm_init(void)
 		if (ret)
 			pr_warning("da850_evm_init: mmcsd0 registration failed:"
 					" %d\n", ret);
+
+		da850_wl12xx_init();
 	}
 
 	davinci_serial_init(&da850_evm_uart_config);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 133aac4..bfe9b71 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -525,6 +525,13 @@ static const struct mux_config da850_pins[] = {
 	MUX_CFG(DA850, MMCSD0_DAT_3,	10,	20,	15,	2,	false)
 	MUX_CFG(DA850, MMCSD0_CLK,	10,	0,	15,	2,	false)
 	MUX_CFG(DA850, MMCSD0_CMD,	10,	4,	15,	2,	false)
+	/* MMC/SD1 function */
+	MUX_CFG(DA850, MMCSD1_DAT_0,	18,	8,	15,	2,	false)
+	MUX_CFG(DA850, MMCSD1_DAT_1,	19,	16,	15,	2,	false)
+	MUX_CFG(DA850, MMCSD1_DAT_2,	19,	12,	15,	2,	false)
+	MUX_CFG(DA850, MMCSD1_DAT_3,	19,	8,	15,	2,	false)
+	MUX_CFG(DA850, MMCSD1_CLK,	18,	12,	15,	2,	false)
+	MUX_CFG(DA850, MMCSD1_CMD,	18,	16,	15,	2,	false)
 	/* EMIF2.5/EMIFA function */
 	MUX_CFG(DA850, EMA_D_7,		9,	0,	15,	1,	false)
 	MUX_CFG(DA850, EMA_D_6,		9,	4,	15,	1,	false)
@@ -583,6 +590,8 @@ static const struct mux_config da850_pins[] = {
 	MUX_CFG(DA850, GPIO3_13,	7,	8,	15,	8,	false)
 	MUX_CFG(DA850, GPIO4_0,		10,	28,	15,	8,	false)
 	MUX_CFG(DA850, GPIO4_1,		10,	24,	15,	8,	false)
+	MUX_CFG(DA850, GPIO6_9,		13,	24,	15,	8,	false)
+	MUX_CFG(DA850, GPIO6_10,	13,	20,	15,	8,	false)
 	MUX_CFG(DA850, GPIO6_13,	13,	8,	15,	8,	false)
 	MUX_CFG(DA850, RTC_ALARM,	0,	28,	15,	2,	false)
 #endif
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 5d4e0fe..a7e92fc 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -857,6 +857,14 @@ enum davinci_da850_index {
 	DA850_MMCSD0_CLK,
 	DA850_MMCSD0_CMD,
 
+	/* MMC/SD1 function */
+	DA850_MMCSD1_DAT_0,
+	DA850_MMCSD1_DAT_1,
+	DA850_MMCSD1_DAT_2,
+	DA850_MMCSD1_DAT_3,
+	DA850_MMCSD1_CLK,
+	DA850_MMCSD1_CMD,
+
 	/* EMIF2.5/EMIFA function */
 	DA850_EMA_D_7,
 	DA850_EMA_D_6,
@@ -916,6 +924,8 @@ enum davinci_da850_index {
 	DA850_GPIO3_13,
 	DA850_GPIO4_0,
 	DA850_GPIO4_1,
+	DA850_GPIO6_9,
+	DA850_GPIO6_10,
 	DA850_GPIO6_13,
 	DA850_RTC_ALARM,
 };
-- 
1.7.4.1

Re: [PATCH 5/5] arm: davinci: DA850: Add wl12xx expansion board support

[Sergei Shtylyov]

Hello.

On 08-07-2011 1:33, Ido Yariv wrote:

> The DA850 supports an optional wl12xx based expansion board, adding WLAN
> &  BT capabilities. The wl12xx is a 4-wire, 1.8V, embedded SDIO WLAN
> device with an external IRQ line and is power-controlled by a GPIO-based
> fixed regulator.

> This patch adds support for the WLAN capabilities of this expansion
> board.

> Signed-off-by: Ido Yariv<ido@wizery.com>
> ---
>   arch/arm/mach-davinci/Kconfig            |   31 +++++++
>   arch/arm/mach-davinci/board-da850-evm.c  |  128 ++++++++++++++++++++++++++++++
>   arch/arm/mach-davinci/da850.c            |    9 ++
>   arch/arm/mach-davinci/include/mach/mux.h |   10 +++
>   4 files changed, 178 insertions(+), 0 deletions(-)

> diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
> index c0deaca..1a9149c 100644
> --- a/arch/arm/mach-davinci/Kconfig
> +++ b/arch/arm/mach-davinci/Kconfig
> @@ -192,6 +192,37 @@ config DA850_UI_RMII
>
>   endchoice
>
> +config DA850_WL12XX
> +	bool "DA850 wl12xx expansion board"
> +	depends on MACH_DAVINCI_DA850_EVM
> +	---help---
> +	  Say Y if you want to use a wl12xx expansion board connected to the
> +	  DA850 EVM.

    If I don't mistake, this expansion board is rather used with AM180x EVM?

> +
> +choice
> +	prompt "FREF reference clock used by the wl12XX expansion board"
> +	default DA850_WL12XX_FREF_38_4
> +	depends on DA850_WL12XX
> +	help
> +	  There are currently two kinds of such daughter boards, one made by
> +	  Mistral and another by LS Research. These (and perhaps others) use
> +	  different FREF reference clocks. Select the correct one according to
> +	  the daughter board's type.
> +
> +config DA850_WL12XX_FREF_19_2
> +	bool "19.2MHz"
> +config DA850_WL12XX_FREF_26
> +	bool "26MHz"
> +config DA850_WL12XX_FREF_38_4
> +	bool "38.4MHz"
> +config DA850_WL12XX_FREF_52
> +	bool "52MHz"
> +config DA850_WL12XX_FREF_XTAL_26
> +	bool "XTAL 26MHz"
> +config DA850_WL12XX_FREF_XTAL_38_4
> +	bool "XTAL 38MHz"

    Could you add emoty lines between items?

> diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
> index a7b41bf..a567379 100644
> --- a/arch/arm/mach-davinci/board-da850-evm.c
> +++ b/arch/arm/mach-davinci/board-da850-evm.c
[...]
> @@ -1117,6 +1122,127 @@ static __init int da850_evm_init_cpufreq(void)
>   static __init int da850_evm_init_cpufreq(void) { return 0; }
>   #endif
>
> +#ifdef CONFIG_DA850_WL12XX
> +
> +static int da850_wl12xx_fref = -1;
> +
> +static int __init setup_da850_wl12xx_fref(char *fref)
> +{
> +	if (!strcmp(fref, "19.2"))
> +		da850_wl12xx_fref = WL12XX_REFCLOCK_19;
> +	else if (!strcmp(fref, "26"))
> +		da850_wl12xx_fref = WL12XX_REFCLOCK_26;
> +	else if (!strcmp(fref, "38.4"))
> +		da850_wl12xx_fref = WL12XX_REFCLOCK_38;
> +	else if (!strcmp(fref, "52"))
> +		da850_wl12xx_fref = WL12XX_REFCLOCK_52;
> +	else if (!strcmp(fref, "XTAL26"))
> +		da850_wl12xx_fref = WL12XX_REFCLOCK_26_XTAL;
> +	else if (!strcmp(fref, "XTAL38.4"))
> +		da850_wl12xx_fref = WL12XX_REFCLOCK_38_XTAL;
> +	else
> +		pr_info("da850_wl12xx_fref is invalid. Valid options: "
> +			"19.2, 26, 38.4, 52, XTAL26 or XTAL38.4\n");
> +	return 0;
> +}
> +__setup("da850_wl12xx_fref=", setup_da850_wl12xx_fref);

    Why then also have a Kconfig 'choice' for that?

> +static void wl12xx_set_power(int slot, bool power_on)
> +{
> +	static bool power_state;
> +
> +	pr_debug("Powering %s wl12xx", (power_on ? "on" : "off"));

    Parens not needed around ?:.

> +	if (power_on) {
> +		/* Power up sequence required for wl127x devices */
> +		gpio_set_value(DA850_WLAN_EN, 1);
> +		mdelay(15);
> +		gpio_set_value(DA850_WLAN_EN, 0);
> +		mdelay(1);
> +		gpio_set_value(DA850_WLAN_EN, 1);
> +		mdelay(70);

    Perhaps msleep()?

> +static void da850_wl12xx_init(void)
> +{
> +	int ret;
> +
> +	ret = davinci_cfg_reg_list(da850_evm_mmc_wl12xx_pins);
> +	if (ret)
> +		pr_warning("da850_evm_init: wl12xx/mmc mux setup failed:"
> +			   " %d\n", ret);
> +
> +	ret = da850_register_mmcsd1(&da850_mmc_wl12xx_config);
> +	if (ret)
> +		pr_warning("da850_evm_init: wl12xx/mmc registration failed:"
> +			   " %d\n", ret);

    If these fail, does it makse sense to continue? I doubt it...

> +	if (gpio_request(DA850_WLAN_EN, "wl12xx_en") ||
> +	    gpio_direction_output(DA850_WLAN_EN, 0))

    Use gpio_request_one() instead of this pair.

> +		pr_err("Error initializing the wl12xx enable gpio\n");
> +
> +	if (gpio_request(DA850_WLAN_IRQ, "wl12xx_irq") ||
> +	    gpio_direction_input(DA850_WLAN_IRQ))

    Same here.

> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> index 133aac4..bfe9b71 100644
> --- a/arch/arm/mach-davinci/da850.c
> +++ b/arch/arm/mach-davinci/da850.c
> @@ -525,6 +525,13 @@ static const struct mux_config da850_pins[] = {
>   	MUX_CFG(DA850, MMCSD0_DAT_3,	10,	20,	15,	2,	false)
>   	MUX_CFG(DA850, MMCSD0_CLK,	10,	0,	15,	2,	false)
>   	MUX_CFG(DA850, MMCSD0_CMD,	10,	4,	15,	2,	false)
> +	/* MMC/SD1 function */
> +	MUX_CFG(DA850, MMCSD1_DAT_0,	18,	8,	15,	2,	false)
> +	MUX_CFG(DA850, MMCSD1_DAT_1,	19,	16,	15,	2,	false)
> +	MUX_CFG(DA850, MMCSD1_DAT_2,	19,	12,	15,	2,	false)
> +	MUX_CFG(DA850, MMCSD1_DAT_3,	19,	8,	15,	2,	false)
> +	MUX_CFG(DA850, MMCSD1_CLK,	18,	12,	15,	2,	false)
> +	MUX_CFG(DA850, MMCSD1_CMD,	18,	16,	15,	2,	false)
>   	/* EMIF2.5/EMIFA function */
>   	MUX_CFG(DA850, EMA_D_7,		9,	0,	15,	1,	false)
>   	MUX_CFG(DA850, EMA_D_6,		9,	4,	15,	1,	false)
> @@ -583,6 +590,8 @@ static const struct mux_config da850_pins[] = {
>   	MUX_CFG(DA850, GPIO3_13,	7,	8,	15,	8,	false)
>   	MUX_CFG(DA850, GPIO4_0,		10,	28,	15,	8,	false)
>   	MUX_CFG(DA850, GPIO4_1,		10,	24,	15,	8,	false)
> +	MUX_CFG(DA850, GPIO6_9,		13,	24,	15,	8,	false)
> +	MUX_CFG(DA850, GPIO6_10,	13,	20,	15,	8,	false)
>   	MUX_CFG(DA850, GPIO6_13,	13,	8,	15,	8,	false)
>   	MUX_CFG(DA850, RTC_ALARM,	0,	28,	15,	2,	false)
>   #endif

> diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
> index 5d4e0fe..a7e92fc 100644
> --- a/arch/arm/mach-davinci/include/mach/mux.h
> +++ b/arch/arm/mach-davinci/include/mach/mux.h
> @@ -857,6 +857,14 @@ enum davinci_da850_index {
>   	DA850_MMCSD0_CLK,
>   	DA850_MMCSD0_CMD,
>
> +	/* MMC/SD1 function */
> +	DA850_MMCSD1_DAT_0,
> +	DA850_MMCSD1_DAT_1,
> +	DA850_MMCSD1_DAT_2,
> +	DA850_MMCSD1_DAT_3,
> +	DA850_MMCSD1_CLK,
> +	DA850_MMCSD1_CMD,
> +
>   	/* EMIF2.5/EMIFA function */
>   	DA850_EMA_D_7,
>   	DA850_EMA_D_6,
> @@ -916,6 +924,8 @@ enum davinci_da850_index {
>   	DA850_GPIO3_13,
>   	DA850_GPIO4_0,
>   	DA850_GPIO4_1,
> +	DA850_GPIO6_9,
> +	DA850_GPIO6_10,
>   	DA850_GPIO6_13,
>   	DA850_RTC_ALARM,
>   };

    Please modify these 2 files a sperate patch. Maybe even 2 patches: one for 
MMC1 pins and one for GPIO pins...

WBR, Sergei

Re: [PATCH 5/5] arm: davinci: DA850: Add wl12xx expansion board support

[Ido Yariv]

Hi,

On Fri, Jul 08, 2011 at 02:39:32PM +0400, Sergei Shtylyov wrote:
> Hello.
> 
> On 08-07-2011 1:33, Ido Yariv wrote:
> 
> >The DA850 supports an optional wl12xx based expansion board, adding WLAN
> >&  BT capabilities. The wl12xx is a 4-wire, 1.8V, embedded SDIO WLAN
> >device with an external IRQ line and is power-controlled by a GPIO-based
> >fixed regulator.
> 
> >This patch adds support for the WLAN capabilities of this expansion
> >board.
> 
> >Signed-off-by: Ido Yariv<ido@wizery.com>
> >---
> >  arch/arm/mach-davinci/Kconfig            |   31 +++++++
> >  arch/arm/mach-davinci/board-da850-evm.c  |  128 ++++++++++++++++++++++++++++++
> >  arch/arm/mach-davinci/da850.c            |    9 ++
> >  arch/arm/mach-davinci/include/mach/mux.h |   10 +++
> >  4 files changed, 178 insertions(+), 0 deletions(-)
> 
> >diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
> >index c0deaca..1a9149c 100644
> >--- a/arch/arm/mach-davinci/Kconfig
> >+++ b/arch/arm/mach-davinci/Kconfig
> >@@ -192,6 +192,37 @@ config DA850_UI_RMII
> >
> >  endchoice
> >
> >+config DA850_WL12XX
> >+	bool "DA850 wl12xx expansion board"
> >+	depends on MACH_DAVINCI_DA850_EVM
> >+	---help---
> >+	  Say Y if you want to use a wl12xx expansion board connected to the
> >+	  DA850 EVM.
> 
>    If I don't mistake, this expansion board is rather used with AM180x EVM?

I'm actually not sure about the compatibility between the two, so yes,
it might be a good idea to rename the configuration option and
description.

[...]

> >+config DA850_WL12XX_FREF_19_2
> >+	bool "19.2MHz"
> >+config DA850_WL12XX_FREF_26
> >+	bool "26MHz"
> >+config DA850_WL12XX_FREF_38_4
> >+	bool "38.4MHz"
> >+config DA850_WL12XX_FREF_52
> >+	bool "52MHz"
> >+config DA850_WL12XX_FREF_XTAL_26
> >+	bool "XTAL 26MHz"
> >+config DA850_WL12XX_FREF_XTAL_38_4
> >+	bool "XTAL 38MHz"
> 
>    Could you add emoty lines between items?

Sure.

[...]

> >+static int da850_wl12xx_fref = -1;
> >+
> >+static int __init setup_da850_wl12xx_fref(char *fref)
> >+{
> >+	if (!strcmp(fref, "19.2"))
> >+		da850_wl12xx_fref = WL12XX_REFCLOCK_19;
> >+	else if (!strcmp(fref, "26"))
> >+		da850_wl12xx_fref = WL12XX_REFCLOCK_26;
> >+	else if (!strcmp(fref, "38.4"))
> >+		da850_wl12xx_fref = WL12XX_REFCLOCK_38;
> >+	else if (!strcmp(fref, "52"))
> >+		da850_wl12xx_fref = WL12XX_REFCLOCK_52;
> >+	else if (!strcmp(fref, "XTAL26"))
> >+		da850_wl12xx_fref = WL12XX_REFCLOCK_26_XTAL;
> >+	else if (!strcmp(fref, "XTAL38.4"))
> >+		da850_wl12xx_fref = WL12XX_REFCLOCK_38_XTAL;
> >+	else
> >+		pr_info("da850_wl12xx_fref is invalid. Valid options: "
> >+			"19.2, 26, 38.4, 52, XTAL26 or XTAL38.4\n");
> >+	return 0;
> >+}
> >+__setup("da850_wl12xx_fref=", setup_da850_wl12xx_fref);
> 
>    Why then also have a Kconfig 'choice' for that?

We could choose a default value arbitrarily, but AFAIK there isn't a
good one. The two currently available expansion boards use different
reference clocks, so one of them will not work out of the box.

Having it configurable by a boot argument can be handy when switching
between expansion boards during development. Naturally, it's not a must.

> >+static void wl12xx_set_power(int slot, bool power_on)
> >+{
> >+	static bool power_state;
> >+
> >+	pr_debug("Powering %s wl12xx", (power_on ? "on" : "off"));
> 
>    Parens not needed around ?:.

Sure, will be fixed.

> 
> >+	if (power_on) {
> >+		/* Power up sequence required for wl127x devices */
> >+		gpio_set_value(DA850_WLAN_EN, 1);
> >+		mdelay(15);
> >+		gpio_set_value(DA850_WLAN_EN, 0);
> >+		mdelay(1);
> >+		gpio_set_value(DA850_WLAN_EN, 1);
> >+		mdelay(70);
> 
>    Perhaps msleep()?

Sure, will be fixed.

> >+static void da850_wl12xx_init(void)
> >+{
> >+	int ret;
> >+
> >+	ret = davinci_cfg_reg_list(da850_evm_mmc_wl12xx_pins);
> >+	if (ret)
> >+		pr_warning("da850_evm_init: wl12xx/mmc mux setup failed:"
> >+			   " %d\n", ret);
> >+
> >+	ret = da850_register_mmcsd1(&da850_mmc_wl12xx_config);
> >+	if (ret)
> >+		pr_warning("da850_evm_init: wl12xx/mmc registration failed:"
> >+			   " %d\n", ret);
> 
>    If these fail, does it makse sense to continue? I doubt it...

Right, will be fixed.

> 
> >+	if (gpio_request(DA850_WLAN_EN, "wl12xx_en") ||
> >+	    gpio_direction_output(DA850_WLAN_EN, 0))
> 
>    Use gpio_request_one() instead of this pair.
> 
> >+		pr_err("Error initializing the wl12xx enable gpio\n");
> >+
> >+	if (gpio_request(DA850_WLAN_IRQ, "wl12xx_irq") ||
> >+	    gpio_direction_input(DA850_WLAN_IRQ))
> 
>    Same here.

Sure, will be fixed.

> >diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> >index 133aac4..bfe9b71 100644
> >--- a/arch/arm/mach-davinci/da850.c
> >+++ b/arch/arm/mach-davinci/da850.c
> >@@ -525,6 +525,13 @@ static const struct mux_config da850_pins[] = {
> >  	MUX_CFG(DA850, MMCSD0_DAT_3,	10,	20,	15,	2,	false)
> >  	MUX_CFG(DA850, MMCSD0_CLK,	10,	0,	15,	2,	false)
> >  	MUX_CFG(DA850, MMCSD0_CMD,	10,	4,	15,	2,	false)
> >+	/* MMC/SD1 function */
> >+	MUX_CFG(DA850, MMCSD1_DAT_0,	18,	8,	15,	2,	false)
> >+	MUX_CFG(DA850, MMCSD1_DAT_1,	19,	16,	15,	2,	false)
> >+	MUX_CFG(DA850, MMCSD1_DAT_2,	19,	12,	15,	2,	false)
> >+	MUX_CFG(DA850, MMCSD1_DAT_3,	19,	8,	15,	2,	false)
> >+	MUX_CFG(DA850, MMCSD1_CLK,	18,	12,	15,	2,	false)
> >+	MUX_CFG(DA850, MMCSD1_CMD,	18,	16,	15,	2,	false)
> >  	/* EMIF2.5/EMIFA function */
> >  	MUX_CFG(DA850, EMA_D_7,		9,	0,	15,	1,	false)
> >  	MUX_CFG(DA850, EMA_D_6,		9,	4,	15,	1,	false)
> >@@ -583,6 +590,8 @@ static const struct mux_config da850_pins[] = {
> >  	MUX_CFG(DA850, GPIO3_13,	7,	8,	15,	8,	false)
> >  	MUX_CFG(DA850, GPIO4_0,		10,	28,	15,	8,	false)
> >  	MUX_CFG(DA850, GPIO4_1,		10,	24,	15,	8,	false)
> >+	MUX_CFG(DA850, GPIO6_9,		13,	24,	15,	8,	false)
> >+	MUX_CFG(DA850, GPIO6_10,	13,	20,	15,	8,	false)
> >  	MUX_CFG(DA850, GPIO6_13,	13,	8,	15,	8,	false)
> >  	MUX_CFG(DA850, RTC_ALARM,	0,	28,	15,	2,	false)
> >  #endif
> 
> >diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
> >index 5d4e0fe..a7e92fc 100644
> >--- a/arch/arm/mach-davinci/include/mach/mux.h
> >+++ b/arch/arm/mach-davinci/include/mach/mux.h
> >@@ -857,6 +857,14 @@ enum davinci_da850_index {
> >  	DA850_MMCSD0_CLK,
> >  	DA850_MMCSD0_CMD,
> >
> >+	/* MMC/SD1 function */
> >+	DA850_MMCSD1_DAT_0,
> >+	DA850_MMCSD1_DAT_1,
> >+	DA850_MMCSD1_DAT_2,
> >+	DA850_MMCSD1_DAT_3,
> >+	DA850_MMCSD1_CLK,
> >+	DA850_MMCSD1_CMD,
> >+
> >  	/* EMIF2.5/EMIFA function */
> >  	DA850_EMA_D_7,
> >  	DA850_EMA_D_6,
> >@@ -916,6 +924,8 @@ enum davinci_da850_index {
> >  	DA850_GPIO3_13,
> >  	DA850_GPIO4_0,
> >  	DA850_GPIO4_1,
> >+	DA850_GPIO6_9,
> >+	DA850_GPIO6_10,
> >  	DA850_GPIO6_13,
> >  	DA850_RTC_ALARM,
> >  };
> 
>    Please modify these 2 files a sperate patch. Maybe even 2
> patches: one for MMC1 pins and one for GPIO pins...

Sure, will be fixed.

Thanks for your review,
Ido.