* some help for eMMC 8bit SDMA in sdhci_imx for i:MX25
@ 2012-02-28 7:24 Ulrich Prinz
2012-03-08 19:56 ` Robert Schwebel
0 siblings, 1 reply; 2+ messages in thread
From: Ulrich Prinz @ 2012-02-28 7:24 UTC (permalink / raw)
To: linux-mmc
Hi all,
I encounter some harsh problems using eMMC 4.41 with i.MX25. Transfer
rates are 700kB/s and write is far below 100kB/s using write
reliability.
Used kernel ist 2.6.39.
Crawling code I found that several bits assigned to the defines are
not equal to what the programmers manual tells.
What I got working was the switching to 8bit interface for the
recognition phase. But in the moment of data transfer I get block
erros.
So my question is, has someone alreday 8bit transfers working with
this combination or can give me some helpful tips?
Best regards and thanks in advance
Ulrich
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: some help for eMMC 8bit SDMA in sdhci_imx for i:MX25
2012-02-28 7:24 some help for eMMC 8bit SDMA in sdhci_imx for i:MX25 Ulrich Prinz
@ 2012-03-08 19:56 ` Robert Schwebel
0 siblings, 0 replies; 2+ messages in thread
From: Robert Schwebel @ 2012-03-08 19:56 UTC (permalink / raw)
To: Ulrich Prinz; +Cc: linux-mmc
On Tue, Feb 28, 2012 at 08:24:00AM +0100, Ulrich Prinz wrote:
> Used kernel ist 2.6.39.
Could you try to reproduce that on top-of-tree? I don't think it makes
much sense to search for problems on such an old kernel.
rsc
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