From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
Cc: Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 2/3] mmc: sunxi: Set the 'New Timing' register for 8 bits DDR transfers
Date: Fri, 29 Jul 2016 21:36:34 +0200 [thread overview]
Message-ID: <20160729193634.GA27116@lukather> (raw)
In-Reply-To: <20160721112655.941b1dad04f7a5b94d4172c1-GANU6spQydw@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 736 bytes --]
On Thu, Jul 21, 2016 at 11:26:55AM +0200, Jean-Francois Moine wrote:
> On Thu, 21 Jul 2016 10:56:15 +0200
> Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
> > On Wed, Jul 20, 2016 at 08:16:28PM +0200, Jean-Francois Moine wrote:
> > > The 'new timing mode' with 8 bits DDR works correctly when the NewTiming
> > > register is set.
> >
> > What does that mode brings to the table?
>
> From my tests, the eMMC of the Banana Pi M3 (A83T) cannot work when the
> new mode is not used.
That's odd. The one in the Pine64 seems to work just fine, and yet
there's only the new mode on the A64.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-07-29 19:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-21 6:28 [PATCH 0/3] mmc: sunxi: Changes in the host driver Jean-Francois Moine
[not found] ` <cover.1469082481.git.moinejf-GANU6spQydw@public.gmane.org>
2016-07-20 18:01 ` [PATCH 1/3] mmc: sunxi: Check the value returned by clk_round_rate Jean-Francois Moine
[not found] ` <c2231f3df66cf77e4fb9051f7b0c27ea69b8e63d.1469082481.git.moinejf-GANU6spQydw@public.gmane.org>
2016-07-21 8:49 ` Maxime Ripard
2016-07-20 18:16 ` [PATCH 2/3] mmc: sunxi: Set the 'New Timing' register for 8 bits DDR transfers Jean-Francois Moine
[not found] ` <bc7b767cad6db159a44c4b98d5b1f3eb53c26bd3.1469082481.git.moinejf-GANU6spQydw@public.gmane.org>
2016-07-21 8:56 ` Maxime Ripard
2016-07-21 9:26 ` Jean-Francois Moine
[not found] ` <20160721112655.941b1dad04f7a5b94d4172c1-GANU6spQydw@public.gmane.org>
2016-07-29 19:17 ` Maxime Ripard
2016-07-30 5:18 ` Jean-Francois Moine
2016-07-30 10:19 ` [linux-sunxi] " Hans de Goede
[not found] ` <9414aab0-ac2b-01c2-e16b-8f7394ea7b68-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2016-08-01 13:52 ` Jean-Francois Moine
[not found] ` <20160801155246.b7b3c7f0f582394b4c25f6dc-GANU6spQydw@public.gmane.org>
2016-08-02 8:37 ` Hans de Goede
2016-07-29 19:36 ` Maxime Ripard [this message]
2016-07-30 5:20 ` Jean-Francois Moine
2016-07-20 18:28 ` [PATCH 3/3] mmc: sunxi: Add support to the Allwinner A83T Jean-Francois Moine
2016-07-21 8:58 ` Maxime Ripard
2016-07-21 9:18 ` Jean-Francois Moine
[not found] ` <20160721111851.133a3f16d6e9de1ee45b3654-GANU6spQydw@public.gmane.org>
2016-07-22 19:00 ` Jean-Francois Moine
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